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Searched refs:soc_con2 (Results 1 – 13 of 13) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
A Dgrf_rk3036.h37 unsigned int soc_con2; member
A Dgrf_rk3368.h64 u32 soc_con2; member
A Dgrf_rk3188.h40 u32 soc_con2; member
A Dgrf_rv1108.h65 u32 soc_con2; member
A Dgrf_rk3288.h60 u32 soc_con2; member
102 u32 soc_con2; member
A Dgrf_rk3128.h41 unsigned int soc_con2; member
A Dgrf_rk3399.h160 u32 soc_con2; member
/u-boot/arch/arm/mach-rockchip/rk3288/
A Drk3288.c83 rk_setreg(&grf->soc_con2, 1 << 0); in arch_cpu_init()
/u-boot/arch/arm/include/asm/arch-rk3308/
A Dgrf_rk3308.h121 unsigned int soc_con2; member
/u-boot/drivers/ram/rockchip/
A Dsdram_rk3288.c236 rk_clrsetreg(&grf->soc_con2, mask, in ddr_set_en_bst_odt()
619 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride); in dram_all_config()
816 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, 0x17); in sdram_init()
818 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, 0x1a); in sdram_init()
A Dsdram_rk3188.c218 rk_clrsetreg(&grf->soc_con2, mask, val); in ddr_set_ddr3_mode()
227 rk_clrsetreg(&grf->soc_con2, mask, val); in ddr_rank_2_row15en()
/u-boot/doc/device-tree-bindings/clock/
A Drockchip,rk3288-dmc.txt109 stride - stride value for soc_con2 register
/u-boot/arch/arm/mach-rockchip/rk3036/
A Dsdram_rk3036.c621 writel(RK_SETBITS(MSCH4_MAINDDR3), &priv->grf->soc_con2); in pctl_cfg()

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