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Searched refs:socfpga_get_sysmgr_addr (Results 1 – 25 of 27) sorted by relevance

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/u-boot/arch/arm/mach-socfpga/
A Dsystem_manager_gen5.c24 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_NAND_USEFPGA) == in populate_sysmgr_fpgaintf_module()
27 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_RGMII1_USEFPGA) == in populate_sysmgr_fpgaintf_module()
30 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SDMMC_USEFPGA) == in populate_sysmgr_fpgaintf_module()
36 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SPIM0_USEFPGA) == in populate_sysmgr_fpgaintf_module()
39 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SPIM1_USEFPGA) == in populate_sysmgr_fpgaintf_module()
45 setbits_le32(socfpga_get_sysmgr_addr() + in populate_sysmgr_fpgaintf_module()
49 handoff_val = readl(socfpga_get_sysmgr_addr() + in populate_sysmgr_fpgaintf_module()
54 socfpga_get_sysmgr_addr() + in populate_sysmgr_fpgaintf_module()
64 u32 regs = (u32)socfpga_get_sysmgr_addr() + SYSMGR_GEN5_EMACIO; in sysmgr_pinmux_init()
85 setbits_le32(socfpga_get_sysmgr_addr() + in sysmgr_config_warmrstcfgio()
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A Dsystem_manager_s10.c33 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NAND_USEFPGA) == in populate_sysmgr_fpgaintf_module()
36 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SDMMC_USEFPGA) == in populate_sysmgr_fpgaintf_module()
39 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SPIM0_USEFPGA) == in populate_sysmgr_fpgaintf_module()
42 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SPIM1_USEFPGA) == in populate_sysmgr_fpgaintf_module()
46 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGAINTF_EN2); in populate_sysmgr_fpgaintf_module()
49 if (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0_USEFPGA) == in populate_sysmgr_fpgaintf_module()
59 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGAINTF_EN3); in populate_sysmgr_fpgaintf_module()
75 (u8 *)socfpga_get_sysmgr_addr() + SYSMGR_SOC64_PINSEL0); in populate_sysmgr_pinmux()
83 (u8 *)socfpga_get_sysmgr_addr() + SYSMGR_SOC64_IOCTRL0); in populate_sysmgr_pinmux()
91 (u8 *)socfpga_get_sysmgr_addr() + in populate_sysmgr_pinmux()
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A Dreset_manager_s10.c75 setbits_le32(socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
83 read_poll_timeout(readl, socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
89 socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
93 writel(1, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT); in socfpga_bridges_reset()
96 read_poll_timeout(readl, socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
103 read_poll_timeout(readl, socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
115 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT); in socfpga_bridges_reset()
A Dwrap_pll_config_s10.c41 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1); in cm_get_osc_clk_hz()
43 return readl(socfpga_get_sysmgr_addr() + in cm_get_osc_clk_hz()
58 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2); in cm_get_fpga_clk_hz()
60 return readl(socfpga_get_sysmgr_addr() + in cm_get_fpga_clk_hz()
A Dreset_manager_arria10.c99 setbits_le32(socfpga_get_sysmgr_addr() + SYSMGR_A10_NOC_IDLEREQ_CLR, in socfpga_reset_deassert_bridges_handoff()
107 return wait_for_bit_le32((const void *)(socfpga_get_sysmgr_addr() + in socfpga_reset_deassert_bridges_handoff()
200 socfpga_get_sysmgr_addr() + SYSMGR_A10_NOC_IDLEREQ_SET); in socfpga_bridges_reset()
204 socfpga_get_sysmgr_addr() + SYSMGR_A10_NOC_TIMEOUT); in socfpga_bridges_reset()
207 ret = wait_for_bit_le32((const void *)(socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
220 ret = wait_for_bit_le32((const void *)(socfpga_get_sysmgr_addr() + in socfpga_bridges_reset()
242 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_A10_NOC_TIMEOUT); in socfpga_bridges_reset()
A Dmisc_gen5.c125 const u32 bootinfo = readl(socfpga_get_sysmgr_addr() + in print_cpuinfo()
140 const u32 bsel = readl(socfpga_get_sysmgr_addr() + in arch_misc_init()
200 socfpga_get_sysmgr_addr() + SYSMGR_GEN5_WARMRAMGRP_EN); in arch_early_init_r()
203 iswgrp_handoff[i] = readl(socfpga_get_sysmgr_addr() + in arch_early_init_r()
230 readl(socfpga_get_sysmgr_addr() + in do_bridge_reset()
235 socfpga_get_sysmgr_addr() + in do_bridge_reset()
246 writel(0, socfpga_get_sysmgr_addr() + in do_bridge_reset()
A Dsecure_reg_helper.c22 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SDMMC; in socfpga_secure_convert_reg_id_to_addr()
25 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0; in socfpga_secure_convert_reg_id_to_addr()
28 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC1; in socfpga_secure_convert_reg_id_to_addr()
31 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC2; in socfpga_secure_convert_reg_id_to_addr()
A Dspl_gen5.c34 const u32 bsel = readl(socfpga_get_sysmgr_addr() + in spl_boot_device()
83 reg = readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); in board_init_f()
86 socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); in board_init_f()
89 socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); in board_init_f()
A Dmisc_arria10.c83 socfpga_get_sysmgr_addr() + SYSMGR_A10_ECC_INTMASK_SET); in socfpga_init_security_policies()
107 const u32 bootinfo = readl(socfpga_get_sysmgr_addr() + in print_cpuinfo()
A Dreset_manager_gen5.c85 socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(0)); in socfpga_bridges_set_handoff_regs()
87 socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(1)); in socfpga_bridges_set_handoff_regs()
A Dfirewall.c104 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_DMA); in firewall_setup()
106 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_DMA_PERIPH); in firewall_setup()
A Dmisc_s10.c77 return (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGA_CONFIG) & in is_fpga_config_ready()
A Dscan_manager.c220 writel(0x1, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL); in scan_mgr_get_fpga_id()
255 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL); in scan_mgr_get_fpga_id()
A Dspl_agilex.c57 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); in board_init_f()
A Dclock_manager_agilex.c70 return readl(socfpga_get_sysmgr_addr() + in cm_get_qspi_controller_clk_hz()
A Dspl_s10.c59 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); in board_init_f()
A Dspl_a10.c72 const u32 bsel = readl(socfpga_get_sysmgr_addr() + SYSMGR_A10_BOOTINFO); in spl_boot_device()
A Dmisc.c269 phys_addr_t socfpga_get_sysmgr_addr(void) in socfpga_get_sysmgr_addr() function
/u-boot/drivers/mmc/
A Dsocfpga_dw_mmc.c75 writel(sdmmc_mask, socfpga_get_sysmgr_addr() + SYSMGR_SDMMC); in socfpga_dwmci_clksel()
78 readl(socfpga_get_sysmgr_addr() + SYSMGR_SDMMC)); in socfpga_dwmci_clksel()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dsystem_manager.h9 phys_addr_t socfpga_get_sysmgr_addr(void);
/u-boot/drivers/net/
A Ddwmac_socfpga.c73 u32 index = ((u64)pdata->phy_intf - socfpga_get_sysmgr_addr() - in dwmac_socfpga_do_setphy()
/u-boot/drivers/fpga/
A Dsocfpga_gen5.c215 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_FPGAINFGRP_MODULE); in socfpga_load()
A Dsocfpga_arria10.c824 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_A10_FPGAINTF_EN_GLOBAL); in socfpga_loadfs()
916 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_A10_FPGAINTF_EN_GLOBAL); in socfpga_load()
/u-boot/drivers/ddr/altera/
A Dsdram_gen5.c462 socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(4)); in sdram_mmr_init_full()
468 socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(3)); in sdram_mmr_init_full()
524 row = readl(socfpga_get_sysmgr_addr() + in sdram_calculate_size()
A Dsdram_soc64.c105 return wait_for_bit_le32((const void *)(socfpga_get_sysmgr_addr() + in poll_hmc_clock_status()

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