Searched refs:sor (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/video/tegra124/ |
| A D | sor.c | 75 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu()
84 tegra_sor_write_field(sor, PR(sor->portnum), mask, pe_reg); in tegra_dp_set_pe_vs_pc()
85 tegra_sor_write_field(sor, DC(sor->portnum), mask, vs_reg); in tegra_dp_set_pe_vs_pc()
149 reg_val = tegra_sor_readl(sor, DP_LINKCTL(sor->portnum)); in tegra_dc_sor_set_dp_linkctl()
479 reg = tegra_sor_readl(sor, DP_PADCTL(sor->portnum)); in tegra_dc_sor_power_up()
499 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_power_up()
840 tegra_sor_writel(sor, PR(sor->portnum), in tegra_dc_sor_set_lane_parm()
842 tegra_sor_writel(sor, POSTCURSOR(sor->portnum), in tegra_dc_sor_set_lane_parm()
849 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_set_lane_parm()
952 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()
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| A D | dp.c | 34 struct udevice *sor; member
738 struct udevice *sor, in tegra_dp_set_link_bandwidth() argument
749 struct udevice *sor) in tegra_dp_set_lane_count() argument
1010 struct udevice *sor = dp->sor; in tegra_dp_lt_config() local
1194 struct udevice *sor = dp->sor; in tegra_dc_dp_full_link_training() local
1237 struct udevice *sor) in tegra_dc_dp_fast_link_training() argument
1309 struct udevice *sor) in tegra_dp_do_link_training() argument
1352 struct udevice *sor, in tegra_dc_dp_explore_link_cfg() argument
1475 struct udevice *sor; in tegra_dp_enable() local
1498 if (ret || !sor) { in tegra_dp_enable()
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| A D | Makefile | 8 obj-y += sor.o
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| A D | sor.h | 878 int tegra_dc_sor_enable_dp(struct udevice *sor,
880 int tegra_dc_sor_set_power_state(struct udevice *sor, int pu_pd);
885 void tegra_dc_sor_set_panel_power(struct udevice *sor,
892 void tegra_dc_sor_power_down_unused_lanes(struct udevice *sor,
894 int tegra_dc_sor_set_voltage_swing(struct udevice *sor,
898 void tegra_dp_disable_tx_pu(struct udevice *sor);
902 int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *sor,
905 int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *sor);
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| /u-boot/arch/arm/dts/ |
| A D | tegra210.dtsi | 213 sor@54540000 {
214 compatible = "nvidia,tegra210-sor";
221 clock-names = "sor", "parent", "dp", "safe";
223 reset-names = "sor";
227 sor@54580000 {
235 clock-names = "sor", "parent", "dp", "safe";
237 reset-names = "sor";
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| A D | tegra124.dtsi | 139 sor@54540000 {
140 compatible = "nvidia,tegra124-sor";
147 clock-names = "sor", "parent", "dp", "safe";
149 reset-names = "sor";
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| A D | tegra124-nyan.dtsi | 28 sor@54540000 {
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| /u-boot/doc/device-tree-bindings/gpu/ |
| A D | nvidia,tegra20-host1x.txt | 195 - sor: serial output resource
198 - compatible: "nvidia,tegra124-sor"
204 - sor: clock input for the SOR hardware
211 - sor
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| /u-boot/drivers/mtd/nand/raw/ |
| A D | zynq_nand.c | 118 u32 sor; /* 0x18 */ member
297 writel(ZYNQ_NAND_SET_OPMODE_16BIT, &smc->reg->sor); in zynq_nand_init_nand_flash()
299 writel(ZYNQ_NAND_SET_OPMODE_8BIT, &smc->reg->sor); in zynq_nand_init_nand_flash()
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