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Searched refs:sp (Results 1 – 25 of 112) sorted by relevance

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/u-boot/arch/nios2/cpu/
A Dexceptions.S23 addi sp, sp, -(33*4)
24 stw r0, 0(sp)
25 stw r1, 4(sp)
26 stw r2, 8(sp)
27 stw r3, 12(sp)
28 stw r4, 16(sp)
29 stw r5, 20(sp)
30 stw r6, 24(sp)
31 stw r7, 28(sp)
32 stw r8, 32(sp)
[all …]
A Dstart.S83 mov sp, r5 /* initial stack below u-boot code */
103 addi sp, sp, -8
104 stw r0, 0(sp)
105 stw r0, 4(sp)
106 mov fp, sp
116 mov r4, sp
120 mov sp, r2
121 mov r4, sp
127 mov fp, sp
158 mov sp, r4 /* Set the new sp */
/u-boot/arch/riscv/cpu/
A Dmtrap.S33 addi sp, sp, -32 * REGBYTES
34 SREG x1, 1 * REGBYTES(sp)
35 SREG x2, 2 * REGBYTES(sp)
36 SREG x3, 3 * REGBYTES(sp)
37 SREG x4, 4 * REGBYTES(sp)
38 SREG x5, 5 * REGBYTES(sp)
39 SREG x6, 6 * REGBYTES(sp)
40 SREG x7, 7 * REGBYTES(sp)
41 SREG x8, 8 * REGBYTES(sp)
68 mv a3, sp
[all …]
/u-boot/arch/mips/lib/
A Dgenex.S24 LONG_S $1, PT_R1(sp)
33 LONG_S $8, PT_R8(sp)
34 LONG_S $9, PT_R9(sp)
40 LONG_S v1, PT_HI(sp)
48 LONG_S v1, PT_LO(sp)
69 move sp, k1
71 LONG_S $3, PT_R3(sp)
72 LONG_S $0, PT_R0(sp)
167 LONG_L sp, PT_R29(sp)
190 move a0, sp
[all …]
/u-boot/arch/arm/cpu/armv8/
A Dexceptions.S59 stp x7, x8, [sp, #-16]!
60 stp x5, x6, [sp, #-16]!
61 stp x3, x4, [sp, #-16]!
62 stp x1, x2, [sp, #-16]!
88 mov x0, sp
101 ldp x2, x0, [sp],#16
121 ldp x1, x2, [sp],#16
122 ldp x3, x4, [sp],#16
123 ldp x5, x6, [sp],#16
124 ldp x7, x8, [sp],#16
[all …]
A Dpsci.S103 stp x15, xzr, [sp, #-16]!
119 ldp x18, x15, [sp], #16
121 ldp x19, x20, [sp], #16
122 ldp x21, x22, [sp], #16
123 ldp x23, x24, [sp], #16
124 ldp x25, x26, [sp], #16
125 ldp x27, x28, [sp], #16
126 ldp x29, x30, [sp], #16
128 ldp x15, xzr, [sp], #16
245 mov sp, x0
[all …]
/u-boot/arch/arc/lib/
A D_millicodethunk.S52 st r25, [sp,48]
54 st r24, [sp,44]
56 st r23, [sp,40]
58 st r22, [sp,36]
60 st r21, [sp,32]
62 st r20, [sp,28]
64 st r19, [sp,24]
66 st r18, [sp,20]
68 st r17, [sp,16]
70 st r16, [sp,12]
[all …]
A Dints_low.S60 st %r0, [%sp]
61 st %sp, [%sp, -4]
63 sub %sp, %sp, 8
91 mov %r1, %sp
98 mov %r1, %sp
111 mov %r1, %sp
117 mov %r0, %sp
123 mov %r0, %sp
130 mov %r1, %sp
136 mov %r0, %sp
[all …]
A Dbootm.c28 ulong sp; in arch_lmb_reserve() local
39 sp = get_sp(); in arch_lmb_reserve()
40 debug("## Current stack ends at 0x%08lx ", sp); in arch_lmb_reserve()
43 sp -= 4096; in arch_lmb_reserve()
44 lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); in arch_lmb_reserve()
/u-boot/arch/arm/cpu/armv7/
A Dlowlevel_init.S29 ldr sp, =CONFIG_SPL_STACK
31 ldr sp, =CONFIG_SYS_INIT_SP_ADDR
33 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
44 sub sp, sp, #GD_SIZE
45 bic sp, sp, #7
46 mov r9, sp
/u-boot/arch/arm/mach-mvebu/
A Dlowlevel_spl.S7 stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
9 str sp, [r12]
15 ldr sp, [r12]
17 ldmfd sp!, {r0 - r12, pc} /* @ restore regs and return */
28 stmfd sp!, {r1-r12}
32 ldmfd sp!, {r1-r12}
44 stmfd sp!, {r1-r12}
50 ldmfd sp!, {r1-r12}
62 stmfd sp!, {r1-r12}
68 ldmfd sp!, {r1-r12}
/u-boot/arch/m68k/lib/
A Dbootm.c35 ulong sp; in arch_lmb_reserve() local
46 sp = get_sp(); in arch_lmb_reserve()
47 debug ("## Current stack ends at 0x%08lx ", sp); in arch_lmb_reserve()
50 sp -= 1024; in arch_lmb_reserve()
51 lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); in arch_lmb_reserve()
108 ulong sp; in get_sp() local
111 "movel %%d0, %0\n": "=d"(sp): :"%d0"); in get_sp()
113 return sp; in get_sp()
/u-boot/arch/mips/mach-mtmips/mt7620/
A Dlowlevel_init.S24 PTR_LI sp, 0xb0187f00
28 sp, sp, GD_SIZE # reserve space for gd
30 and sp, sp, t0 # force 16 byte alignment
31 move k0, sp # save gd pointer
33 move fp, sp
/u-boot/arch/arm/mach-imx/
A Dmisc.c91 ulong sp, bank_end; in board_lmb_reserve() local
94 sp = get_sp(); in board_lmb_reserve()
95 debug("## Current stack ends at 0x%08lx ", sp); in board_lmb_reserve()
98 sp -= 4096 << 2; in board_lmb_reserve()
100 if (sp < gd->bd->bi_dram[bank].start) in board_lmb_reserve()
104 if (sp >= bank_end) in board_lmb_reserve()
106 lmb_reserve(lmb, sp, bank_end - sp); in board_lmb_reserve()
/u-boot/arch/arm/lib/
A Dvectors.S191 sub sp, sp, #S_FRAME_SIZE
197 add r5, sp, #S_SP
204 sub sp, sp, #S_FRAME_SIZE
205 stmia sp, {r0 - r12} @ Calling r0-r12
207 add r8, sp, #S_PC
208 stmdb r8, {sp, lr}^ @ Calling SP, LR
213 mov r0, sp
219 ldr lr, [sp, #S_PC] @ Get PC
220 add sp, sp, #S_FRAME_SIZE
238 ldr sp, IRQ_STACK_START
[all …]
A Dcrt0_aarch64_efi.S121 stp x29, x30, [sp, #-32]!
122 mov x29, sp
124 stp x0, x1, [sp, #16]
131 ldp x0, x1, [sp, #16]
134 0: ldp x29, x30, [sp], #32
/u-boot/arch/microblaze/lib/
A Dbootm.c37 ulong sp, bank_end; in arch_lmb_reserve() local
49 sp = get_sp(); in arch_lmb_reserve()
50 debug("## Current stack ends at 0x%08lx ", sp); in arch_lmb_reserve()
53 sp -= 4096; in arch_lmb_reserve()
55 if (sp < gd->bd->bi_dram[bank].start) in arch_lmb_reserve()
59 if (sp >= bank_end) in arch_lmb_reserve()
61 lmb_reserve(lmb, sp, bank_end - sp); in arch_lmb_reserve()
/u-boot/arch/riscv/lib/
A Dcrt0_riscv_efi.S15 #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp)
16 #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp)
21 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp)
22 #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp)
159 addi sp, sp, -(SIZE_LONG * 3)
175 0: addi sp, sp, (SIZE_LONG * 3)
/u-boot/arch/m68k/cpu/mcf523x/
A Dstart.S18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
126 move.l %sp, -(%sp)
131 move.l %d0, %sp
132 move.l %sp, %fp
135 move.l %d0, -(%sp)
144 clr.l %sp@-
241 movel %sp,%sp@-
243 addql #4,%sp
249 movel %sp,%sp@-
[all …]
/u-boot/arch/m68k/cpu/mcf530x/
A Dstart.S19 moveml %d0-%d7/%a0-%a6,%sp@
23 moveml %sp@,%d0-%d7/%a0-%a6;
135 move.l %sp, -(%sp)
139 move.l %d0, %sp
140 move.l %sp, %fp
143 move.l %d0, -(%sp)
150 clr.l %sp@-
246 movel %sp,%sp@-
248 addql #4,%sp
254 movel %sp,%sp@-
[all …]
/u-boot/arch/m68k/cpu/mcf547x_8x/
A Dstart.S18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
133 move.l %sp, -(%sp)
138 move.l %d0, %sp
139 move.l %sp, %fp
142 move.l %d0, -(%sp)
150 clr.l %sp@-
246 movel %sp,%sp@-
248 addql #4,%sp
254 movel %sp,%sp@-
[all …]
/u-boot/arch/m68k/cpu/mcf532x/
A Dstart.S21 moveml %d0-%d7/%a0-%a6,%sp@;
141 move.l %sp, -(%sp)
146 move.l %d0, %sp
147 move.l %sp, %fp
150 move.l %d0, -(%sp)
159 clr.l %sp@-
243 move.l %d0,-(%sp) /* gd */
256 movel %sp,%sp@-
258 addql #4,%sp
264 movel %sp,%sp@-
[all …]
/u-boot/scripts/
A Dcheckstack.pl49 $re = qr/^.*stp.*sp,\#-([0-9]{1,8})\]\!/o;
52 $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
65 $re = qr/.*(?:linkw %fp,|addaw )#-([0-9]{1,4})(?:,%sp)?$/o;
72 $re = qr/.*daddiu.*sp,sp,-(([0-9]{2}|[3-9])[0-9]{2})/o;
75 $re = qr/.*addiu.*sp,sp,-(([0-9]{2}|[3-9])[0-9]{2})/o;
103 $re = qr/.*save.*%sp, -(([0-9]{2}|[3-9])[0-9]{2}), %sp/o;
/u-boot/arch/mips/cpu/
A Dstart.S48 and sp, t1, t0 # force 16 byte alignment
50 sp, sp, GD_SIZE # reserve space for gd
51 and sp, sp, t0 # force 16 byte alignment
52 move k0, sp # save gd pointer
57 sp, sp, t2 # reserve space for early malloc
58 and sp, sp, t0 # force 16 byte alignment
60 move fp, sp
72 PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
/u-boot/arch/m68k/cpu/mcf52x2/
A Dstart.S19 moveml %d0-%d7/%a0-%a6,%sp@; \
22 moveml %sp@,%d0-%d7/%a0-%a6; \
205 move.l %sp, -(%sp)
210 move.l %d0, %sp
211 move.l %sp, %fp
214 move.l %d0, -(%sp)
223 clr.l %sp@-
323 movel %sp,%sp@-
325 addql #4,%sp
331 movel %sp,%sp@-
[all …]

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