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Searched refs:sparecr (Results 1 – 5 of 5) sorted by relevance

/u-boot/board/freescale/common/
A Dmpc85xx_sleep.c52 src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8); in dp_ddr_restore()
91 start_addr = in_be32(&scfg->sparecr[1]); in fsl_dp_resume()
A Darm_sleep.c63 src = (u64 *)in_le32(&scfg->sparecr[2]); in dp_ddr_restore()
125 start_addr = in_le32(&scfg->sparecr[3]); in fsl_dp_resume()
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dls102xa_psci.c37 out_le32(&scfg->sparecr[2], dest); in ls1_save_ddr_head()
77 ippdexpcr1 = in_be32(&scfg->sparecr[7]); in ls1_deepsleep_irq_cfg()
173 out_le32(&scfg->sparecr[3], entry_point); in ls1_deep_sleep()
/u-boot/arch/arm/include/asm/arch-ls102xa/
A Dimmap_ls102xa.h273 u32 sparecr[8]; member
/u-boot/arch/powerpc/include/asm/
A Dimmap_85xx.h3133 u32 sparecr[8]; /* 0x500 Spare Control register(0-7) */ member

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