Home
last modified time | relevance | path

Searched refs:speed_hz (Results 1 – 17 of 17) sorted by relevance

/u-boot/drivers/spi/
A Dfsl_dspi.c78 uint speed_hz; member
101 uint speed_hz; member
358 int speed_hz, uint clkrate) in fsl_dspi_hz_to_spi_baud() argument
368 temp = clkrate / speed_hz; in fsl_dspi_hz_to_spi_baud()
379 debug("Can not find valid baud rate,speed_hz is %d, ", speed_hz); in fsl_dspi_hz_to_spi_baud()
437 speed = priv->speed_hz; in fsl_dspi_cfg_speed()
445 priv->speed_hz = speed; in fsl_dspi_cfg_speed()
506 priv->speed_hz = plat->speed_hz; in fsl_dspi_probe()
510 dm_spi_bus->max_hz = plat->speed_hz; in fsl_dspi_probe()
599 plat->speed_hz = fdtdec_get_int(blob, in fsl_dspi_of_to_plat()
[all …]
A Dzynq_spi.c62 u32 speed_hz; member
156 plat->speed_hz = plat->frequency / 2; in zynq_spi_probe()
158 debug("%s: max-frequency=%d\n", __func__, plat->speed_hz); in zynq_spi_probe()
314 } else if (plat->speed_hz != speed) { in zynq_spi_set_speed()
319 plat->speed_hz = speed / (2 << baud_rate_val); in zynq_spi_set_speed()
A Dfsl_espi.c28 u32 speed_hz; member
345 max_hz = fsl->speed_hz; in espi_setup_slave()
396 fsl->speed_hz = max_hz; in spi_setup_slave()
491 fsl->speed_hz = speed; in fsl_espi_set_speed()
529 fsl->speed_hz = plat->speed_hz; in fsl_espi_probe()
557 plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", in fsl_espi_of_to_plat()
561 &plat->regs_addr, plat->speed_hz); in fsl_espi_of_to_plat()
A Dzynq_qspi.c83 u32 speed_hz; member
206 plat->speed_hz = plat->frequency / 2; in zynq_qspi_probe()
208 debug("%s: max-frequency=%d\n", __func__, plat->speed_hz); in zynq_qspi_probe()
610 } else if (plat->speed_hz != speed) { in zynq_qspi_set_speed()
616 plat->speed_hz = speed / (2 << baud_rate_val); in zynq_qspi_set_speed()
A Drk_spi.c59 unsigned int speed_hz; member
297 if (priv->speed_hz != priv->last_speed_hz) in rockchip_spi_claim_bus()
298 rkspi_set_clk(priv, priv->speed_hz); in rockchip_spi_claim_bus()
516 priv->speed_hz = speed; in rockchip_spi_set_speed()
A Dzynqmp_gqspi.c165 u32 speed_hz; member
324 if (plat->speed_hz != speed) { in zynqmp_qspi_set_speed()
335 plat->speed_hz = plat->frequency / (2 << baud_rate_val); in zynqmp_qspi_set_speed()
343 debug("regs=%p, speed=%d\n", priv->regs, plat->speed_hz); in zynqmp_qspi_set_speed()
381 plat->speed_hz = plat->frequency / 2; in zynqmp_qspi_probe()
A Dcf_spi.c354 cfspi->baudrate = plat->speed_hz; in coldfire_spi_probe()
405 plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", in coldfire_dspi_of_to_plat()
431 plat->speed_hz, plat->num_cs, plat->mode); in coldfire_dspi_of_to_plat()
A Dpic32_spi.c70 u32 speed_hz; /* spi-clk rate */ member
305 priv->speed_hz = speed; in pic32_spi_set_speed()
A Duniphier_spi.c75 u32 speed_hz; member
380 plat->speed_hz = plat->frequency / 2; in uniphier_spi_of_to_plat()
/u-boot/include/dm/platform_data/
A Dfsl_espi.h11 uint speed_hz; member
A Dspi_coldfire.h22 uint speed_hz; member
/u-boot/drivers/i2c/
A Dsandbox_i2c.c74 if (i2c->speed_hz > (is_read ? I2C_SPEED_FAST_RATE : in sandbox_i2c_xfer()
A Di2c-uclass.c417 i2c->speed_hz = speed; in dm_i2c_set_bus_speed()
428 return i2c->speed_hz; in dm_i2c_get_bus_speed()
667 i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", in i2c_post_probe()
670 return dm_i2c_set_bus_speed(dev, i2c->speed_hz); in i2c_post_probe()
A Ddesignware_i2c.h228 int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
A Di2c-gpio.c309 static int i2c_gpio_set_bus_speed(struct udevice *dev, unsigned int speed_hz) in i2c_gpio_set_bus_speed() argument
313 bus->udelay = 1000000 / (speed_hz << 2); in i2c_gpio_set_bus_speed()
A Ddesignware_i2c.c342 int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz, in dw_i2c_gen_speed_config() argument
357 ret = calc_bus_speed(priv, priv->regs, speed_hz, rate, config); in dw_i2c_gen_speed_config()
/u-boot/include/
A Di2c.h122 int speed_hz; member

Completed in 24 milliseconds