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Searched refs:srds_cfg (Results 1 – 13 of 13) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A Dp1010_serdes.c56 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
64 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
66 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
67 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
71 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
78 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
79 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
84 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dp1021_serdes.c57 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
65 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
67 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
68 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
73 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
87 if ((serdes1_cfg_tbl[srds_cfg][1] == PCIE1) || in fsl_serdes_init()
88 (serdes1_cfg_tbl[srds_cfg][1] == PCIE2)) { in fsl_serdes_init()
97 if (srds_cfg == 0x6) { in fsl_serdes_init()
A Dmpc8544_serdes.c57 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
65 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
67 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
68 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
72 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
79 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
80 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
85 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dp1023_serdes.c40 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
47 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
49 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
50 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
54 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dc29x_serdes.c45 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
53 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
55 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
56 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
60 ptr = &serdes1_cfg_tbl[srds_cfg]; in fsl_serdes_init()
A Dmpc8568_serdes.c37 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
44 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
46 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
47 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
52 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dp2020_serdes.c45 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
52 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
54 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
55 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
60 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dp1022_serdes.c95 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
103 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
105 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
106 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
110 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
117 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
118 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
123 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dmpc8572_serdes.c41 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
48 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
50 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
51 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
56 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dbsc9132_serdes.c81 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
88 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
90 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
91 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
96 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
/u-boot/arch/powerpc/cpu/mpc86xx/
A Dmpc8610_serdes.c53 u32 srds_cfg = (pordevsr & MPC8610_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
61 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
63 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
64 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
68 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
75 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
76 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
81 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
A Dmpc8641_serdes.c62 u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
70 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
72 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
73 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
77 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
84 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
85 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
90 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
/u-boot/board/gdsys/p1022/
A Dcontrolcenterd.c207 unsigned int srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in board_serdes_name() local
209 enum slot_id slot = serdes_dev_slot[srds_cfg][device]; in board_serdes_name()

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