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Searched refs:start_addr (Results 1 – 25 of 38) sorted by relevance

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/u-boot/arch/mips/lib/
A Dcache.c111 void __weak flush_cache(ulong start_addr, ulong size) in flush_cache() argument
123 cache_loop(start_addr, start_addr + size, ilsize, in flush_cache()
129 cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D); in flush_cache()
132 cache_loop(start_addr, start_addr + size, slsize, HIT_WRITEBACK_INV_SD); in flush_cache()
135 cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I); in flush_cache()
145 void __weak flush_dcache_range(ulong start_addr, ulong stop) in flush_dcache_range() argument
151 if (start_addr == stop) in flush_dcache_range()
154 cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D); in flush_dcache_range()
169 if (start_addr == stop) in invalidate_dcache_range()
173 cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD); in invalidate_dcache_range()
[all …]
/u-boot/arch/xtensa/lib/
A Dcache.c30 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
32 __flush_invalidate_dcache_range(start_addr, size); in flush_cache()
33 __invalidate_icache_range(start_addr, size); in flush_cache()
42 void flush_dcache_range(ulong start_addr, ulong end_addr) in flush_dcache_range() argument
44 __flush_invalidate_dcache_range(start_addr, end_addr - start_addr); in flush_dcache_range()
/u-boot/cmd/
A Dstrings.c13 static char *start_addr, *last_addr; variable
21 start_addr = (char *)simple_strtoul(argv[1], NULL, 16); in do_strings()
28 char *addr = start_addr; in do_strings()
35 last_addr = addr + (last_addr - start_addr); in do_strings()
36 start_addr = addr; in do_strings()
A Dload.c147 ulong start_addr = ~0; in load_serial() local
177 if ((store_addr) < start_addr) in load_serial()
178 start_addr = store_addr; in load_serial()
186 size = end_addr - start_addr + 1; in load_serial()
191 start_addr, end_addr, size, size in load_serial()
193 flush_cache(start_addr, size); in load_serial()
A Dmem.c712 static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, in mem_test_alt() argument
736 num_words = (end_addr - start_addr) / sizeof(vu_long); in mem_test_alt()
840 start_addr + offset*sizeof(vu_long), in mem_test_alt()
862 start_addr + offset*sizeof(vu_long), in mem_test_alt()
903 start_addr + offset*sizeof(vu_long), in mem_test_alt()
924 start_addr + offset*sizeof(vu_long), in mem_test_alt()
1001 static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr, in mem_test_quick() argument
1025 length = (end_addr - start_addr) / sizeof(ulong); in mem_test_quick()
1048 (uint)(uintptr_t)(start_addr + offset*sizeof(vu_long)), in mem_test_quick()
/u-boot/arch/powerpc/cpu/mpc8xxx/
A Dpamu_table.c18 tbl->start_addr[i] = in construct_pamu_addr_table()
21 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
25 tbl->start_addr[i] = in construct_pamu_addr_table()
28 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
33 tbl->start_addr[i] = in construct_pamu_addr_table()
36 tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; in construct_pamu_addr_table()
42 debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); in construct_pamu_addr_table()
/u-boot/cmd/ti/
A Dddr3.c237 u32 start_addr, end_addr, range, ecc_ctrl; in is_addr_valid() local
253 if ((addr >= start_addr) && (addr <= end_addr)) in is_addr_valid()
265 if ((addr >= start_addr) && (addr <= end_addr)) in is_addr_valid()
285 u32 start_addr, end_addr, size, ecc_err; in do_ddr_test() local
293 start_addr = simple_strtoul(argv[2], NULL, 16); in do_ddr_test()
296 if (!is_addr_valid(start_addr)) { in do_ddr_test()
301 ddr_memory_ecc_err(start_addr, ecc_err); in do_ddr_test()
309 start_addr = simple_strtoul(argv[2], NULL, 16); in do_ddr_test()
312 if ((start_addr < CONFIG_SYS_SDRAM_BASE) || in do_ddr_test()
313 (start_addr > (CONFIG_SYS_SDRAM_BASE + in do_ddr_test()
[all …]
/u-boot/arch/mips/mach-octeon/
A Dcache.c11 void flush_dcache_range(ulong start_addr, ulong stop) in flush_dcache_range() argument
17 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
21 void invalidate_dcache_range(ulong start_addr, ulong stop) in invalidate_dcache_range() argument
A Dcvmx-bootmem.c1364 int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size, in cvmx_bootmem_reserve_memory() argument
1373 __func__, CAST_ULL(start_addr), CAST_ULL(size), name, flags); in cvmx_bootmem_reserve_memory()
1389 if (addr >= start_addr && addr < start_addr + size) { in cvmx_bootmem_reserve_memory()
1390 reserve_size = size - (addr - start_addr); in cvmx_bootmem_reserve_memory()
1393 } else if (start_addr > addr && in cvmx_bootmem_reserve_memory()
1394 start_addr < (addr + block_size)) { in cvmx_bootmem_reserve_memory()
1395 reserve_size = block_size - (start_addr - addr); in cvmx_bootmem_reserve_memory()
1401 name, (unsigned long long)start_addr, in cvmx_bootmem_reserve_memory()
/u-boot/board/freescale/common/
A Dmpc85xx_sleep.c81 u32 start_addr; in fsl_dp_resume() local
91 start_addr = in_be32(&scfg->sparecr[1]); in fsl_dp_resume()
92 debug("Entry address is 0x%08x\n", start_addr); in fsl_dp_resume()
93 kernel_resume = (void (*)(void))start_addr; in fsl_dp_resume()
A Darm_sleep.c115 u32 start_addr; in fsl_dp_resume() local
125 start_addr = in_le32(&scfg->sparecr[3]); in fsl_dp_resume()
126 debug("Entry address is 0x%08x\n", start_addr); in fsl_dp_resume()
127 kernel_resume = (void (*)(void))start_addr; in fsl_dp_resume()
/u-boot/arch/powerpc/lib/
A Dcache.c12 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument
17 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); in flush_cache()
18 end = start_addr + size - 1; in flush_cache()
/u-boot/drivers/ddr/altera/
A Dsdram_soc64.c139 phys_addr_t start_addr; in sdram_init_ecc_bits() local
145 start_addr = bd->bi_dram[0].start; in sdram_init_ecc_bits()
149 memset((void *)start_addr, 0, PGTABLE_SIZE + PGTABLE_OFF); in sdram_init_ecc_bits()
150 gd->arch.tlb_addr = start_addr + PGTABLE_OFF; in sdram_init_ecc_bits()
152 start_addr += PGTABLE_SIZE + PGTABLE_OFF; in sdram_init_ecc_bits()
159 sdram_clear_mem(start_addr, size_init); in sdram_init_ecc_bits()
161 start_addr += size_init; in sdram_init_ecc_bits()
169 start_addr = bd->bi_dram[bank].start; in sdram_init_ecc_bits()
/u-boot/arch/arm/mach-mvebu/
A Ddram.c172 u32 start_addr; in dram_ecc_scrubbing() local
191 start_addr = 0; in dram_ecc_scrubbing()
196 start_addr = 0x1000000; in dram_ecc_scrubbing()
197 size -= start_addr; in dram_ecc_scrubbing()
200 mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1, in dram_ecc_scrubbing()
/u-boot/arch/arm/cpu/armv7m/
A Dcache.c139 static int action_cache_range(enum cache_action action, u32 start_addr, in action_cache_range() argument
157 start_addr &= ~(cline_size - 1); in action_cache_range()
160 writel(start_addr, action_reg); in action_cache_range()
162 start_addr += cline_size; in action_cache_range()
A Dmpu.c38 writel(reg_config->start_addr | VALID_REGION | reg_config->region_no, in mpu_config()
/u-boot/board/xilinx/zynq/
A Dbootimg.c132 int zynq_validate_partition(u32 start_addr, u32 len, u32 chksum_off) in zynq_validate_partition() argument
139 md5_wd((u8 *)start_addr, len, &calchecksum[0], 0x10000); in zynq_validate_partition()
/u-boot/drivers/mmc/
A Dsdhci.c104 host->start_addr = dma_map_single(buf, trans_bytes, in sdhci_prepare_dma()
108 dma_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), host->start_addr); in sdhci_prepare_dma()
114 host->start_addr); in sdhci_prepare_dma()
131 dma_addr_t start_addr = host->start_addr; in sdhci_transfer_data() local
164 start_addr &= in sdhci_transfer_data()
166 start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE; in sdhci_transfer_data()
167 start_addr = dev_phys_to_bus(mmc_to_dev(host->mmc), in sdhci_transfer_data()
168 start_addr); in sdhci_transfer_data()
169 sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS); in sdhci_transfer_data()
181 dma_unmap_single(host->start_addr, data->blocks * data->blocksize, in sdhci_transfer_data()
[all …]
/u-boot/arch/arm/include/asm/
A Domap_sec_common.h37 int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr,
A Darmv7_mpu.h86 uint32_t start_addr; member
/u-boot/include/
A Dzynq_bootimg.h31 int zynq_validate_partition(u32 start_addr, u32 len, u32 chksum_off);
/u-boot/arch/arm/cpu/arm926ejs/mxs/
A Dmxs.c73 void mx28_fixup_vt(uint32_t start_addr) in mx28_fixup_vt() argument
85 vt[i + 8] = start_addr + (4 * i); in mx28_fixup_vt()
/u-boot/arch/arm/mach-omap2/
A Dsec-common.c212 int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr, in secure_emif_firewall_setup() argument
223 region_num, start_addr, size); in secure_emif_firewall_setup()
227 (start_addr & 0xFFFFFFF0) | (region_num & 0x0F), in secure_emif_firewall_setup()
/u-boot/arch/arm/cpu/armv7/
A Dmpu_v7r.c72 asm volatile ("mcr p15, 0, %0, c6, c1, 0" : : "r" (rgn->start_addr)); in mpu_config()
/u-boot/arch/m68k/lib/
A Dcache.c15 void flush_cache(ulong start_addr, ulong size) in flush_cache() argument

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