| /u-boot/arch/mips/mach-ath79/ar933x/ |
| A D | lowlevel_init.S | 88 and t1, t1, t2
130 andi t1, t1, 0x02
150 and t1, t1, t2
152 or t1, t1, t2
191 and t1, t1, t2
217 and t1, t1, t2
236 and t1, t1, t2
248 or t1, t1, t2
255 andi t1, t1, 0x8
261 and t1, t1, t2
[all …]
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| /u-boot/arch/mips/mach-ath79/qca956x/ |
| A D | qca956x-ddr-tap.S | 52 lw t1, 0x0(t0)
54 or t3, t1, t2
99 and t1, t1, t2
105 and t2, t1, t4
112 and t5, t5, t1
118 and t3, t3, t1
125 lw t1, 0x4(t0)
126 addiu t1, t1, 0x1
127 sw t1, 0x4(t0)
130 lw t1, 0x0(t0)
[all …]
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| /u-boot/board/imgtec/malta/ |
| A D | lowlevel_init.S | 39 beq t0, t1, _gt64120
43 beq t0, t1, _msc01
67 sw t0, GT_ISD_OFS(t1)
74 sw t0, GT_PCI0IOLD_OFS(t1)
76 sw t0, GT_PCI0IOHD_OFS(t1)
80 sw t0, GT_PCI0M0LD_OFS(t1)
82 sw t0, GT_PCI0M0HD_OFS(t1)
85 sw t0, GT_PCI0M1LD_OFS(t1)
112 and t1, t2
120 li t1, 0x0
[all …]
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| /u-boot/arch/mips/mach-ath79/qca953x/ |
| A D | lowlevel_init.S | 104 or t1, t1, t2
109 and t1, t1, t2
115 li t1, 0x01
123 andi t1, t1, 0x02
124 beqz t1, 1b
128 li t1, MK_DPLL2(2, 16)
154 and t1, t1, t2
160 and t1, t1, t2
166 and t1, t1, t2
179 lui t1, 0x03fc
[all …]
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| /u-boot/arch/riscv/cpu/ |
| A D | start.S | 126 li t1, 1
158 li t1, 1
159 1: amoswap.w.aq t1, t1, 0(t0)
160 bnez t1, 1b
170 li t1, 1
171 sll t1, t1, tp
173 or t2, t2, t1
288 addi t1, t1, REGBYTES
298 add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */
339 addi t1, t1, (REGBYTES*3)
[all …]
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| /u-boot/arch/mips/lib/ |
| A D | cache_init.S | 90 and t0, t0, t1
91 PTR_LI t1, CKSEG1
92 or t0, t0, t1
181 or t1, t1, GCR_L2_CONFIG_BYPASS
210 li t1, 2
214 andi t1, t1, MIPS_CONF2_SA >> MIPS_CONF2_SA_SHF
215 addiu t1, t1, 1
219 andi t1, t1, MIPS_CONF2_SS >> MIPS_CONF2_SS_SHF
221 li t1, 64
288 bne t0, t1, 1b
[all …]
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| /u-boot/arch/mips/mach-jz47xx/ |
| A D | start.S | 41 li t1, 0x00800000
42 mtc0 t1, CP0_CAUSE
47 lw t1, 0x24(t0)
48 ori t1, t1, 0x22
49 sw t1, 0x24(t0)
67 addu t1, t0, CONFIG_SYS_DCACHE_SIZE
70 bne t0, t1, 1b
74 addu t1, t0, CONFIG_SYS_ICACHE_SIZE
77 bne t0, t1, 2b
|
| /u-boot/board/qemu-mips/ |
| A D | lowlevel_init.S | 18 li t1, 0x00400000
19 mtc0 t1, CP0_STATUS
25 li t1, 0x00000003
26 mtc0 t1, CP0_CONFIG
32 li t1, 0x00800000
33 mtc0 t1, CP0_CAUSE
|
| /u-boot/lib/ |
| A D | sha512.c | 144 uint64_t a, b, c, d, e, f, g, h, t1, t2; in sha512_transform() local
169 t1 = h + e1(e) + Ch(e,f,g) + sha512_K[i ] + W[(i & 15)]; in sha512_transform()
170 t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; in sha512_transform()
172 t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; in sha512_transform()
174 t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; in sha512_transform()
176 t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; in sha512_transform()
178 t2 = e0(e) + Maj(e,f,g); h+=t1; d=t1+t2; in sha512_transform()
180 t2 = e0(d) + Maj(d,e,f); g+=t1; c=t1+t2; in sha512_transform()
182 t2 = e0(c) + Maj(c,d,e); f+=t1; b=t1+t2; in sha512_transform()
184 t2 = e0(b) + Maj(b,c,d); e+=t1; a=t1+t2; in sha512_transform()
[all …]
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| /u-boot/arch/mips/mach-octeon/ |
| A D | lowlevel_init.S | 59 PTR_LA t1, _start
60 daddu t0, t1, t3 /* t0 now has actual address of _start */
74 sd a0, 0(t1)
75 sd a1, 8(t1)
76 sd a2, 16(t1)
77 sd a3, 24(t1)
79 addiu t1, 32
80 bne t1, t2, 1b
|
| /u-boot/board/coreboot/coreboot/ |
| A D | coreboot.c | 34 const struct smbios_type1 *t1 = (struct smbios_type1 *)system; in show_board_info() local
36 if (!t0 || !t1) in show_board_info()
40 const char *model = smbios_string(system, t1->product_name); in show_board_info()
41 const char *manufacturer = smbios_string(system, t1->manufacturer); in show_board_info()
|
| /u-boot/board/imgtec/boston/ |
| A D | lowlevel_init.S | 29 1: lw t1, 0(t0)
30 andi t1, t1, BOSTON_PLAT_DDR3STAT_CALIB
31 beqz t1, 1b
|
| /u-boot/arch/mips/cpu/ |
| A D | cm_init.S | 31 PTR_LI t1, CONFIG_MIPS_CM_BASE
32 beq t0, t1, 2f
38 sw t1, GCR_BASE(t0)
|
| A D | start.S | 31 mtc0 t1, CP0_WATCHHI,\sel
47 PTR_LI t1, CONFIG_SYS_INIT_SP_ADDR
48 and sp, t1, t0 # force 16 byte alignment
67 blt t0, t1, 1b
181 li t1, 0x7 # Clear I, R and W conditions
|
| /u-boot/arch/mips/mach-pic32/ |
| A D | lowlevel_init.S | 17 li t1, 0x00800000
18 mtc0 t1, CP0_CAUSE
|
| /u-boot/arch/mips/mach-mscc/ |
| A D | lowlevel_init.S | 24 li t1, CONFIG_SYS_TEXT_BASE
26 add s0, s0, t1
|
| /u-boot/arch/powerpc/lib/ |
| A D | _ashldi3.S | 36 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
38 or r3,r3,r6 # MSW |= t1
|
| A D | _lshrdi3.S | 36 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
38 or r4,r4,r6 # LSW |= t1
|
| A D | _ashrdi3.S | 36 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
39 or r4,r4,r6 # LSW |= t1
|
| /u-boot/arch/mips/include/asm/ |
| A D | regdef.h | 28 #define t1 $9 macro
79 #define t1 $13 macro
|
| /u-boot/board/CZ.NIC/turris_mox/ |
| A D | mox_sp.c | 102 static inline void res_to_mac(u8 *mac, u32 t1, u32 t2) in res_to_mac() argument
104 mac[0] = t1 >> 8; in res_to_mac()
105 mac[1] = t1; in res_to_mac()
|
| /u-boot/lib/libavb/ |
| A D | avb_sha256.c | 58 t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
61 wv[d] += t1; \
62 wv[h] = t1 + t2; \
114 uint32_t t1, t2; in SHA256_transform() local
139 t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] + in SHA256_transform()
145 wv[4] = wv[3] + t1; in SHA256_transform()
149 wv[0] = t1 + t2; in SHA256_transform()
|
| A D | avb_sha512.c | 60 t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
63 wv[d] += t1; \
64 wv[h] = t1 + t2; \
133 uint64_t t1, t2; in SHA512_transform() local
275 t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] + in SHA512_transform()
281 wv[4] = wv[3] + t1; in SHA512_transform()
285 wv[0] = t1 + t2; in SHA512_transform()
|
| /u-boot/drivers/video/ |
| A D | ati_radeon_fb.c | 624 unsigned long t1, hsynch, vsynch; in video_hw_init() local
671 t1 = (res_mode->left_margin + res_mode->xres + in video_hw_init()
673 t1 *= 8; in video_hw_init()
674 t1 *= res_mode->pixclock; in video_hw_init()
675 t1 /= 1000; in video_hw_init()
676 hsynch = 1000000000L / t1; in video_hw_init()
677 t1 *= (res_mode->upper_margin + res_mode->yres + in video_hw_init()
679 t1 /= 1000; in video_hw_init()
680 vsynch = 1000000000L / t1; in video_hw_init()
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| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | clock.c | 555 u64 pd, mfi = 1, mfn, mfd, t1; in calc_pll_params() local
584 t1 = n_target * pd; in calc_pll_params()
585 do_div(t1, (4 * n_ref)); in calc_pll_params()
586 mfi = t1; in calc_pll_params()
598 t1 = n_target * pd; in calc_pll_params()
599 do_div(t1, 4); in calc_pll_params()
600 t1 -= n_ref * mfi; in calc_pll_params()
601 t1 *= mfd; in calc_pll_params()
602 do_div(t1, n_ref); in calc_pll_params()
603 mfn = t1; in calc_pll_params()
|