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Searched refs:tWC_min (Results 1 – 7 of 7) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dnand_timings.c52 .tWC_min = 100000,
94 .tWC_min = 45000,
136 .tWC_min = 35000,
178 .tWC_min = 30000,
220 .tWC_min = 25000,
262 .tWC_min = 20000,
A Dstm32_fmc2_nand.c656 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
657 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
658 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
718 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
719 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
720 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
A Dsunxi_nand.c1294 if (timings->tWC_min > (min_clk_period * 2)) in sunxi_nand_chip_set_timings()
1295 min_clk_period = DIV_ROUND_UP(timings->tWC_min, 2); in sunxi_nand_chip_set_timings()
A Docteontx_nand.c578 s_wc = timing_to_cycle(timings->tWC_min, sclk); in set_timings()
1396 t_wc_n[mode] = t->tWC_min; in octeontx_nand_setup_dat_intf()
A Ddenali.c1023 rdwr_en_lo_hi = DIV_ROUND_UP(max(timings->tRC_min, timings->tWC_min), in denali_setup_data_interface()
A Dpxa3xx_nand.c482 u32 tWP_min = DIV_ROUND_UP(t->tWC_min - t->tWH_min, 1000); in pxa3xx_nand_set_sdr_timing()
/u-boot/include/linux/mtd/
A Drawnand.h746 u32 tWC_min; member

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