Searched refs:tWTR (Results 1 – 12 of 12) sorted by relevance
| /u-boot/arch/arm/dts/ |
| A D | elpida_ecb240abacn.dtsi | 17 tWTR-min-tck = <2>;
33 tWTR = <7500>;
55 tWTR = <10000>;
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | dram_sun9i.c | 124 struct dram_sun9i_timing tWTR; member
387 const u32 tWTR = MAX(para->tWTR.ck, PS2CYCLES_ROUNDUP(para->tWTR.ps)); in mctl_channel_init() local
520 #define WR2PRE (MCTL_BL/2 + CWL + tWTR) in mctl_channel_init()
522 #define WR2RD (MCTL_BL/2 + CWL + tWTR) in mctl_channel_init()
644 (tRCD << 12) | (tRP << 8) | (tWTR << 4) | (tRTP << 0), in mctl_channel_init()
897 .tWTR = { .ck = 4, .ps = 7500 }, in sunxi_dram_init()
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| A D | emif.c | 62 .tWTR = 2,
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| A D | sdram.c | 643 .tWTR = 2,
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| /u-boot/arch/arm/mach-omap2/omap4/ |
| A D | emif.c | 84 .tWTR = 2,
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| A D | sdram_elpida.c | 267 .tWTR = 2,
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| /u-boot/board/tbs/tbs2910/ |
| A D | tbs2910.cfg | 83 /* tDLLK=0x1ff+1,tRTP=3+1,tWTR=3+1,tRRD=3+1 */
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| /u-boot/board/buffalo/lsxl/ |
| A D | kwbimage-lschl.cfg | 59 # bit19-16: 2, 3 cyle tWTR
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| A D | kwbimage-lsxhl.cfg | 59 # bit19-16: 2, 3 cyle tWTR
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| /u-boot/board/d-link/dns325/ |
| A D | kwbimage.cfg | 56 # bit19-16: 2, 3 cyle tWTR
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| /u-boot/arch/arm/include/asm/ |
| A D | emif.h | 1175 u32 tWTR; member
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| /u-boot/arch/arm/mach-omap2/ |
| A D | emif-common.c | 703 val = max(min_tck->tWTR, ns_x2_2_cycles(timings->tWTRx2)) - 1; in get_sdram_tim_1_reg()
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