Searched refs:t_rrd (Results 1 – 4 of 4) sorted by relevance
| /u-boot/arch/arm/mach-lpc32xx/ |
| A D | dram.c | 49 writel(dram->trrd, &emc->t_rrd); in ddr_init()
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| /u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| A D | emc.h | 29 u32 t_rrd; /* Active bank A to active bank B latency */ member
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| /u-boot/arch/arm/mach-keystone/ |
| A D | ddr3_spd.c | 109 u32 t_rrd; member
221 spd->t_rrd = ((buf->trrd_min * mtb) - 1) / spd->t_ck + 1; in ddrtimingcalculation()
327 (spd->t_rrd & 0xf) << 22 | in init_ddr3param()
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| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | ddr3_training.c | 1628 u32 t_rcd = 0, t_rp = 0, t_wr = 0, t_wtr = 0, t_rrd = 0, t_rtp = 0, in ddr3_tip_set_timing() local
1665 t_rrd = (page_size == 1) ? mv_ddr_speed_bin_timing_get(speed_bin_index, in ddr3_tip_set_timing()
1668 t_rrd = GET_MAX_VALUE(t_ckclk * 4, t_rrd); in ddr3_tip_set_timing()
1687 t_rrd = time_to_nclk(t_rrd, t_ckclk); in ddr3_tip_set_timing()
1703 (((t_rrd - 1) & SDRAM_TIMING_LOW_TRRD_MASK) << SDRAM_TIMING_LOW_TRRD_OFFS) | in ddr3_tip_set_timing()
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