/u-boot/arch/arm/mach-sunxi/dram_timings/ |
A D | h616_ddr3_1333.c | 38 u8 tmod = max(ns_to_t(15), 12); /* JEDEC: max(15 ns, 12nCK) */ in mctl_set_timing_params() local 62 writel((tmrw << 20) | (tmrd << 12) | tmod, &mctl_ctl->dramtmg[3]); in mctl_set_timing_params()
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A D | ddr3_1333.c | 26 u8 tmod = 12; in mctl_set_timing_params() local 65 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
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A D | lpddr3_stock.c | 26 u8 tmod = 12; in mctl_set_timing_params() local 61 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
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A D | ddr2_v3s.c | 26 u8 tmod = 12; in mctl_set_timing_params() local 62 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
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A D | h6_lpddr3.c | 53 u8 tmod = 12; in mctl_set_timing_params() local 92 writel((tmrw << 20) | (tmrd << 12) | tmod, &mctl_ctl->dramtmg[3]); in mctl_set_timing_params()
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A D | h6_ddr3_1333.c | 68 u8 tmod = max(ns_to_t(15), 12); /* JEDEC: max(15 ns, 12nCK) */ in mctl_set_timing_params() local 104 writel((tmrw << 20) | (tmrd << 12) | tmod, &mctl_ctl->dramtmg[3]); in mctl_set_timing_params()
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | sdram_rk3288.h | 66 u32 tmod; member
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A D | sdram_rk3036.h | 67 u32 tmod; member 264 u32 tmod; member
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A D | sdram_rk322x.h | 100 u32 tmod; member 226 u32 tmod; member
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A D | ddr_rk3368.h | 77 u32 tmod; member
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A D | ddr_rk3288.h | 68 u32 tmod; member
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/u-boot/arch/arm/include/asm/arch-vf610/ |
A D | ddrmc-vf610.h | 32 u8 tmod; member
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/u-boot/board/phytec/pcm052/ |
A D | pcm052.c | 112 .tmod = 12, in dram_init() 167 .tmod = 12, in dram_init()
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/u-boot/arch/arm/mach-sunxi/ |
A D | dram_sun8i_a33.c | 112 u8 tmod = 12; in auto_set_timing_para() local 146 reg_val = (tmrw << 16) | (tmrd << 12) | (tmod << 0); in auto_set_timing_para()
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A D | dram_sun8i_a83t.c | 112 u8 tmod = 12; in auto_set_timing_para() local 178 reg_val = (tmrw << 16) | (tmrd << 12) | (tmod << 0); in auto_set_timing_para()
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A D | dram_sun6i.c | 233 writel(MCTL_TMOD, &mctl_ctl->tmod); in mctl_channel_init()
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/u-boot/arch/arm/mach-imx/ |
A D | ddrmc-vf610.c | 138 DDRMC_CR17_TMOD(timings->tmod), &ddrmr->cr[17]); in ddrmc_ctrl_init_ddr3()
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/u-boot/board/freescale/vf610twr/ |
A D | vf610twr.c | 106 .tmod = 12, in dram_init()
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/u-boot/board/toradex/colibri_vf/ |
A D | colibri_vf.c | 107 .tmod = 12, in dram_init()
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/u-boot/arch/arm/include/asm/arch-sunxi/ |
A D | dram_sun6i.h | 100 u32 tmod; /* 0x130 */ member
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/u-boot/doc/device-tree-bindings/clock/ |
A D | rockchip,rk3288-dmc.txt | 82 tmod
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/u-boot/arch/mips/mach-octeon/include/mach/cvmx/ |
A D | cvmx-lmcx-defs.h | 4065 uint64_t tmod:4; member 4079 uint64_t tmod:4; member 4095 uint64_t tmod:5; member 4110 uint64_t tmod:5; member
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/u-boot/drivers/ram/rockchip/ |
A D | dmc-rk3368.c | 519 pctl_timing->tmod = max(12u, ps_to_tCK(15000, freq)); in pctl_calc_timings()
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/u-boot/arch/arm/dts/ |
A D | uniphier-pxs2.dtsi | 571 socionext,tmod-calibration = <0x0f86 0x6844>;
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A D | uniphier-pxs3.dtsi | 552 socionext,tmod-calibration = <0x0f22 0x68ee>;
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