Searched refs:tmp_count (Results 1 – 3 of 3) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_init.c | 201 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local
232 tmp_count = 0; in ddr3_save_and_set_training_windows()
252 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
254 reg = ((SDRAM_CS_SIZE + 1) * (tmp_count)) & 0xFFFF0000; in ddr3_save_and_set_training_windows()
255 reg_write(win_base_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
260 win_jump_index * tmp_count, 0); in ddr3_save_and_set_training_windows()
263 tmp_count++; in ddr3_save_and_set_training_windows()
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| A D | ddr3_write_leveling.c | 189 u32 tmp_count, ecc, reg; in ddr3_wl_supplement() local
229 tmp_count = 0; in ddr3_wl_supplement()
266 tmp_count * (SDRAM_CS_SIZE + 1) + in ddr3_wl_supplement()
422 tmp_count++; in ddr3_wl_supplement()
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| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_plat.c | 1139 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local
1169 tmp_count = 0; in ddr3_save_and_set_training_windows()
1189 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
1191 reg = (((SDRAM_CS_SIZE + 1) * (tmp_count)) & in ddr3_save_and_set_training_windows()
1193 reg_write(win_base_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
1198 win_jump_index * tmp_count, 0); in ddr3_save_and_set_training_windows()
1200 tmp_count++; in ddr3_save_and_set_training_windows()
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