/u-boot/board/work-microwave/work_92105/ |
A D | work_92105_spl.c | 27 .trc = 13888888, 47 .trc = 14814814,
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/u-boot/arch/arm/mach-sunxi/dram_timings/ |
A D | h6_lpddr3.c | 32 u8 trc = ns_to_t(70); in mctl_set_timing_params() local 89 writel((txp << 16) | (trtp << 8) | trc, &mctl_ctl->dramtmg[1]); in mctl_set_timing_params() 118 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
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A D | h6_ddr3_1333.c | 53 u8 trc = ns_to_t(53); /* JEDEC: 49.5 ns */ in mctl_set_timing_params() local 101 writel((txp << 16) | (trtp << 8) | trc, &mctl_ctl->dramtmg[1]); in mctl_set_timing_params() 130 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
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A D | h616_ddr3_1333.c | 27 u8 trc = ns_to_t(53); /* JEDEC: 49.5 ns */ in mctl_set_timing_params() local 59 writel((txp << 16) | (trtp << 8) | trc, &mctl_ctl->dramtmg[1]); in mctl_set_timing_params()
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A D | ddr3_1333.c | 14 u8 trc = ns_to_t(53); in mctl_set_timing_params() local 60 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
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A D | lpddr3_stock.c | 14 u8 trc = ns_to_t(70); in mctl_set_timing_params() local 56 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
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A D | ddr2_v3s.c | 14 u8 trc = ns_to_t(65); in mctl_set_timing_params() local 57 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
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/u-boot/drivers/ddr/fsl/ |
A D | ddr1_dimm_params.c | 117 compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc) in compute_trc_ps_from_spd() argument 119 return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; in compute_trc_ps_from_spd() 317 pdimm->trc_ps = compute_trc_ps_from_spd(0, spd->trc); in ddr_compute_dimm_parameters()
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A D | ddr2_dimm_params.c | 116 compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc) in compute_trc_ps_from_spd() argument 118 return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; in compute_trc_ps_from_spd() 316 pdimm->trc_ps = compute_trc_ps_from_spd(spd->trctrfc_ext, spd->trc); in ddr_compute_dimm_parameters()
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/u-boot/board/timll/devkit3250/ |
A D | devkit3250_spl.c | 34 .trc = 15384616,
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/u-boot/include/ |
A D | spd.h | 56 unsigned char trc; /* 41 Min Active to Auto refresh time tRC */ member
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A D | ddr_spd.h | 52 unsigned char trc; /* 41 Min Active to Auto refresh time tRC */ member 120 unsigned char trc; /* 41 Min Active to Auto refresh time tRC */ member
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | sdram_rk3288.h | 51 u32 trc; member
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A D | sdram_rk3036.h | 52 u32 trc; member 249 u32 trc; member
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A D | sdram_rk322x.h | 85 u32 trc; member 211 u32 trc; member
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A D | ddr_rk3368.h | 62 u32 trc; member
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/u-boot/arch/arm/include/asm/arch-vf610/ |
A D | ddrmc-vf610.h | 21 u8 trc; member
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/u-boot/drivers/ram/ |
A D | stm32_sdram.c | 130 u8 trc; member 206 | timing->trc << FMC_SDTR_TRC_SHIFT in stm32_sdram_init() 216 | timing->trc << FMC_SDTR_TRC_SHIFT in stm32_sdram_init()
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/u-boot/arch/arm/mach-lpc32xx/ |
A D | dram.c | 46 writel((ck / dram->trc) & 0x0000001F, &emc->t_rc); in ddr_init()
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/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
A D | emc.h | 88 u32 trc; member
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/u-boot/board/phytec/pcm052/ |
A D | pcm052.c | 101 .trc = 6, in dram_init() 156 .trc = 6, in dram_init()
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/u-boot/arch/arm/mach-sunxi/ |
A D | dram_sun8i_a83t.c | 98 u8 trc = ns_to_t(53); in auto_set_timing_para() local 150 trc = ns_to_t(70); in auto_set_timing_para() 174 reg_val = (txp << 16) | (trtp << 8) | (trc << 0); in auto_set_timing_para()
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A D | dram_sun8i_a33.c | 98 u8 trc = ns_to_t(53); in auto_set_timing_para() local 142 reg_val = (txp << 16) | (trtp << 8) | (trc << 0); in auto_set_timing_para()
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/u-boot/doc/device-tree-bindings/memory-controllers/ |
A D | st,stm32-fmc.txt | 22 trc
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/u-boot/arch/arm/include/asm/arch-omap3/ |
A D | mem.h | 66 #define ACTIM_CTRLA(trfc, trc, tras, trp, trcd, trrd, tdpl, tdal) \ argument 68 ACTIM_CTRLA_TRC(trc) | \
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