/u-boot/arch/arm/mach-sunxi/dram_timings/ |
A D | h6_lpddr3.c | 31 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local 93 writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, in mctl_set_timing_params() 118 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
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A D | h6_ddr3_1333.c | 52 u8 trcd = ns_to_t(15); /* JEDEC: 13.5 ns */ in mctl_set_timing_params() local 105 writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, in mctl_set_timing_params() 130 writel((trc << 17) | (trcd << 9) | (twtr << 1), &mctl_phy->dtpr[5]); in mctl_set_timing_params()
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A D | h616_ddr3_1333.c | 26 u8 trcd = ns_to_t(15); /* JEDEC: 13.5 ns */ in mctl_set_timing_params() local 63 writel((trcd << 24) | (tccd << 16) | (trrd << 8) | trp, in mctl_set_timing_params()
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A D | ddr3_1333.c | 13 u8 trcd = ns_to_t(15); in mctl_set_timing_params() local 67 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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A D | lpddr3_stock.c | 13 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local 63 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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A D | ddr2_v3s.c | 13 u8 trcd = ns_to_t(20); in mctl_set_timing_params() local 64 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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/u-boot/arch/arm/mach-imx/mx6/ |
A D | opos6ul.c | 145 .trcd = 1500, 186 mem_ddr.trcd = 1375; in spl_dram_init()
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A D | litesom.c | 145 .trcd = 1375,
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/u-boot/include/ |
A D | spd.h | 44 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
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/u-boot/board/gateworks/gw_ventana/ |
A D | gw_ventana_spl.c | 161 .trcd = 1375, 175 .trcd = 1375, 189 .trcd = 1375, 203 .trcd = 1375,
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/u-boot/board/freescale/mx6memcal/ |
A D | spl.c | 256 .trcd = 1375, 270 .trcd = 1375, 284 .trcd = 1375, 298 .trcd = 1350,
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/u-boot/board/bachmann/ot1200/ |
A D | ot1200_spl.c | 99 .trcd = 1375,
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/u-boot/board/ccv/xpress/ |
A D | spl.c | 75 .trcd = 1375,
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/u-boot/board/compulab/cm_fx6/ |
A D | spl.c | 119 .trcd = 1800, 188 .trcd = 1324,
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/u-boot/board/barco/platinum/ |
A D | spl_picon.c | 94 .trcd = 1375,
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A D | spl_titanium.c | 94 .trcd = 1375,
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | sdram_rk3288.h | 52 u32 trcd; member
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/u-boot/board/technexion/pico-imx6/ |
A D | spl.c | 150 .trcd = 1500, 164 .trcd = 1500,
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/u-boot/drivers/ram/ |
A D | stm32_sdram.c | 133 u8 trcd; member 203 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init() 213 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
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/u-boot/board/ge/b1x5v2/ |
A D | spl.c | 263 .trcd = 1310, 276 .trcd = 1310, 289 .trcd = 1310,
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/u-boot/doc/device-tree-bindings/clock/ |
A D | rockchip,rk3288-dmc.txt | 50 rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet 68 trcd 142 rockchip,trcd = <10>;
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/u-boot/arch/arm/mach-sunxi/ |
A D | dram_sun8i_a83t.c | 97 u8 trcd = ns_to_t(15); in auto_set_timing_para() local 149 trcd = max(ns_to_t(24), 2); in auto_set_timing_para() 180 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
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/u-boot/board/bticino/mamoj/ |
A D | spl.c | 101 .trcd = 1375,
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/u-boot/doc/device-tree-bindings/memory-controllers/ |
A D | st,stm32-fmc.txt | 24 trcd
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/u-boot/board/engicam/common/ |
A D | spl.c | 214 .trcd = 1375, 364 .trcd = 1375,
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