Searched refs:tuning (Results 1 – 25 of 27) sorted by relevance
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| /u-boot/drivers/ram/stm32mp1/ |
| A D | Kconfig | 12 in device tree (computed by DDR tuning tools)
19 used for DDR tuning tools
42 bool "STM32MP1 DDR driver : support of tuning"
46 activate tuning command in STM32MP1 DDR interactive mode
47 used for DDR tuning tools
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| A D | stm32mp1_tests.h | 31 extern const struct test_desc tuning[];
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| A D | stm32mp1_interactive.c | 488 tuning, tuning_nb); in stm32mp1_ddr_interactive()
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| A D | stm32mp1_tuning.c | 1530 const struct test_desc tuning[] = { variable
1540 const int tuning_nb = ARRAY_SIZE(tuning);
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| /u-boot/arch/arm/dts/ |
| A D | imxrt1020.dtsi | 92 fsl,tuning-start-tap = <20>;
93 fsl,tuning-step= <2>;
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| A D | imxrt1050.dtsi | 84 fsl,tuning-start-tap = <20>;
85 fsl,tuning-step= <2>;
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| A D | imx8mp.dtsi | 703 fsl,tuning-start-tap = <20>;
704 fsl,tuning-step= <2>;
717 fsl,tuning-start-tap = <20>;
718 fsl,tuning-step= <2>;
731 fsl,tuning-start-tap = <20>;
732 fsl,tuning-step= <2>;
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| A D | fsl-imx8qm.dtsi | 475 fsl,tuning-start-tap = <20>;
476 fsl,tuning-step= <2>;
492 fsl,tuning-start-tap = <20>;
493 fsl,tuning-step= <2>;
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| A D | imx6sll.dtsi | 737 fsl,tuning-step = <2>;
738 fsl,tuning-start-tap = <20>;
751 fsl,tuning-step = <2>;
752 fsl,tuning-start-tap = <20>;
765 fsl,tuning-step = <2>;
766 fsl,tuning-start-tap = <20>;
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| A D | imx7ulp.dtsi | 332 fsl,tuning-start-tap = <20>;
333 fsl,tuning-step= <2>;
346 fsl,tuning-start-tap = <20>;
347 fsl,tuning-step= <2>;
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| A D | fsl-imx8dx.dtsi | 483 fsl,tuning-start-tap = <20>;
484 fsl,tuning-step= <2>;
501 fsl,tuning-start-tap = <20>;
502 fsl,tuning-step= <2>;
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| A D | imx8mm.dtsi | 837 fsl,tuning-start-tap = <20>;
838 fsl,tuning-step= <2>;
851 fsl,tuning-start-tap = <20>;
852 fsl,tuning-step= <2>;
865 fsl,tuning-start-tap = <20>;
866 fsl,tuning-step= <2>;
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| A D | imx8mn.dtsi | 844 fsl,tuning-start-tap = <20>;
845 fsl,tuning-step= <2>;
858 fsl,tuning-start-tap = <20>;
859 fsl,tuning-step= <2>;
872 fsl,tuning-start-tap = <20>;
873 fsl,tuning-step= <2>;
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| A D | imx7d-pico.dtsi | 311 tuning-step = <2>;
340 fsl,tuning-step = <2>;
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| A D | imx7d-sdb.dts | 429 fsl,tuning-step = <2>;
441 fsl,tuning-step = <2>;
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| A D | imx7d-meerkat96.dts | 196 fsl,tuning-step = <2>;
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| A D | imx8mq.dtsi | 1095 fsl,tuning-start-tap = <20>;
1096 fsl,tuning-step = <2>;
1110 fsl,tuning-start-tap = <20>;
1111 fsl,tuning-step = <2>;
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| A D | imx7s-warp.dts | 274 fsl,tuning-step = <2>;
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| /u-boot/drivers/mmc/ |
| A D | mmc.c | 1648 uint tuning; member
1692 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1793 if (mwt->tuning && !mmc_host_is_spi(mmc)) { in sd_select_mode_and_width()
1795 mwt->tuning); in sd_select_mode_and_width()
1918 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1925 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
2170 if (mwt->tuning) { in mmc_select_mode_and_width()
2172 mwt->tuning); in mmc_select_mode_and_width()
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| A D | Kconfig | 164 200MHz. This mode requires tuning the IO.
171 200MHz. This mode requires tuning the IO.
177 200MHz. This mode requires tuning the IO.
183 200MHz. This mode requires tuning the IO.
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| /u-boot/doc/device-tree-bindings/memory-controllers/ |
| A D | st,stm32mp1-ddr.txt | 131 - st,phy-cal : phy cal depending of calibration or tuning of DDR
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| /u-boot/doc/device-tree-bindings/net/ |
| A D | micrel-ksz90x1.txt | 3 Some boards require special tuning values, particularly when it comes to
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| /u-boot/board/synopsys/iot_devkit/ |
| A D | README | 19 prompt which might be used for U-Boot environment fine-tuning, manual
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| /u-boot/doc/ |
| A D | README.fdt-control | 193 work on several platforms (like IO tuning parameters).
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| A D | README.fsl-ddr | 275 For DDR parameter tuning up and debugging, the interactive DDR debugger can
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