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Searched refs:ui (Results 1 – 18 of 18) sorted by relevance

/u-boot/drivers/phy/
A Dphy-core-mipi-dphy.c25 unsigned long long ui; in phy_mipi_dphy_get_default_config() local
34 do_div(ui, hs_clk_rate); in phy_mipi_dphy_get_default_config()
37 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_get_default_config()
47 cfg->hs_prepare = 40000 + 4 * ui; in phy_mipi_dphy_get_default_config()
48 cfg->hs_zero = 105000 + 6 * ui; in phy_mipi_dphy_get_default_config()
49 cfg->hs_settle = 85000 + 6 * ui; in phy_mipi_dphy_get_default_config()
63 cfg->hs_trail = max(4 * 8 * ui, 60000 + 4 * 4 * ui); in phy_mipi_dphy_get_default_config()
84 unsigned long long ui; in phy_mipi_dphy_config_validate() local
90 do_div(ui, cfg->hs_clk_rate); in phy_mipi_dphy_config_validate()
119 if (cfg->eot > (105000 + 12 * ui)) in phy_mipi_dphy_config_validate()
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/u-boot/drivers/ddr/marvell/axp/
A Dxor.c29 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init()
30 xor_regs_base_backup[ui] = reg_read(XOR_BASE_ADDR_REG(0, ui)); in mv_sys_xor_init()
31 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init()
32 xor_regs_mask_backup[ui] = reg_read(XOR_SIZE_MASK_REG(0, ui)); in mv_sys_xor_init()
35 for (ui = 0; ui < (dram_info->num_cs + 1); ui++) { in mv_sys_xor_init()
51 for (ui = 0; ui < MAX_CS; ui++) { in mv_sys_xor_init()
57 switch (ui) { in mv_sys_xor_init()
87 u32 ui; in mv_sys_xor_finish() local
90 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_finish()
91 reg_write(XOR_BASE_ADDR_REG(0, ui), xor_regs_base_backup[ui]); in mv_sys_xor_finish()
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A Dddr3_sdram.c291 u32 ui, dq, pup; in ddr3_sdram_pbs_compare() local
336 for (ui = 0; ui < LEN_PBS_PATTERN; ui++) { in ddr3_sdram_pbs_compare()
337 if ((sdram_data[ui]) != (pattern_ptr[ui])) { in ddr3_sdram_pbs_compare()
342 var1 = ((sdram_data[ui] >> val) & in ddr3_sdram_pbs_compare()
344 var2 = ((pattern_ptr[ui] >> val) & in ddr3_sdram_pbs_compare()
350 (ui % pup_groups)); in ddr3_sdram_pbs_compare()
584 u32 ui; in ddr3_dram_sram_read() local
590 for (ui = 0; ui < len; ui++) { in ddr3_dram_sram_read()
A Dddr3_init.c142 u32 ui, reg, cs; in ddr3_restore_and_set_final_windows() local
160 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_restore_and_set_final_windows()
161 reg_write((win_ctrl_reg + 0x4 * ui), win_backup[ui]); in ddr3_restore_and_set_final_windows()
201 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local
227 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_save_and_set_training_windows()
228 win_backup[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
/u-boot/drivers/ddr/marvell/a38x/
A Dxor.c23 u32 reg, ui, cs_count; in mv_sys_xor_init() local
27 for (ui = 0; ui < MAX_CS_NUM + 1; ui++) in mv_sys_xor_init()
30 for (ui = 0; ui < MAX_CS_NUM + 1; ui++) in mv_sys_xor_init()
35 for (ui = 0, cs_count = 0; in mv_sys_xor_init()
37 ui++, cs_count++) { in mv_sys_xor_init()
40 reg |= (0x1 << (ui)); in mv_sys_xor_init()
51 ui++, cs_count++) { in mv_sys_xor_init()
60 switch (ui) { in mv_sys_xor_init()
96 u32 ui; in mv_sys_xor_finish() local
99 for (ui = 0; ui < MAX_CS_NUM + 1; ui++) in mv_sys_xor_finish()
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A Dddr3_debug.c1286 u32 ui, uj; in print_topology() local
1294 for (ui = 0; ui < MAX_INTERFACE_NUM; ui++) { in print_topology()
1295 VALIDATE_IF_ACTIVE(topology_db->if_act_mask, ui); in print_topology()
1296 printf("\n\tInterface ID: %d\n", ui); in print_topology()
1299 interface_params[ui].memory_freq)); in print_topology()
1306 interface_params[ui].memory_size)); in print_topology()
1310 topology_db->interface_params[ui].cas_l); in print_topology()
1316 topology_db->interface_params[ui]. in print_topology()
1319 topology_db->interface_params[ui]. in print_topology()
1323 interface_params[ui].as_bus_params[uj]. in print_topology()
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A Dmv_ddr_plat.c1105 u32 ui; in ddr3_restore_and_set_final_windows() local
1111 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_restore_and_set_final_windows()
1112 reg_write((win_ctrl_reg + 0x4 * ui), win[ui]); in ddr3_restore_and_set_final_windows()
1139 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local
1164 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_save_and_set_training_windows()
1165 win[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
/u-boot/fs/ubifs/
A Dsuper.c318 ui->synced_i_size = ui->ui_size = inode->i_size; in ubifs_iget()
338 memcpy(ui->data, ino->data, ui->data_len); in ubifs_iget()
339 ((char *)ui->data)[ui->data_len] = '\0'; in ubifs_iget()
359 ui->data = kmalloc(ui->data_len + 1, GFP_NOFS); in ubifs_iget()
364 memcpy(ui->data, ino->data, ui->data_len); in ubifs_iget()
365 ((char *)ui->data)[ui->data_len] = '\0'; in ubifs_iget()
389 memcpy(ui->data, ino->data, ui->data_len); in ubifs_iget()
413 ui->data = kmalloc(ui->data_len + 1, GFP_NOFS); in ubifs_iget()
418 memcpy(ui->data, ino->data, ui->data_len); in ubifs_iget()
419 ((char *)ui->data)[ui->data_len] = '\0'; in ubifs_iget()
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A Ddebug.c1087 mutex_lock(&ui->ui_mutex); in dbg_check_synced_i_size()
1088 spin_lock(&ui->ui_lock); in dbg_check_synced_i_size()
1089 if (ui->ui_size != ui->synced_i_size && !ui->dirty) { in dbg_check_synced_i_size()
1091 ui->ui_size, ui->synced_i_size); in dbg_check_synced_i_size()
1097 spin_unlock(&ui->ui_lock); in dbg_check_synced_i_size()
1098 mutex_unlock(&ui->ui_mutex); in dbg_check_synced_i_size()
1848 struct ubifs_inode *ui; in add_inode() local
1894 ui = ubifs_inode(inode); in add_inode()
1897 fscki->xattr_cnt = ui->xattr_cnt; in add_inode()
1898 fscki->xattr_sz = ui->xattr_size; in add_inode()
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A Dubifs.c495 struct ubifs_inode *ui; in ubifs_findfile() local
512 ui = ubifs_inode(inode); in ubifs_findfile()
522 memcpy(link_name, ui->data, ui->data_len); in ubifs_findfile()
523 link_name[ui->data_len] = '\0'; in ubifs_findfile()
A Dbudget.c603 struct ubifs_inode *ui) in ubifs_release_dirty_inode_budget() argument
609 req.dd_growth = c->bi.inode_budget + ALIGN(ui->data_len, 8); in ubifs_release_dirty_inode_budget()
A Drecovery.c1518 struct ubifs_inode *ui; in ubifs_recover_size() local
1526 ui = ubifs_inode(inode); in ubifs_recover_size()
1532 ui->ui_size = e->d_size; in ubifs_recover_size()
1533 ui->synced_i_size = e->d_size; in ubifs_recover_size()
A Dubifs.h2162 struct ubifs_inode *ui);
/u-boot/board/gateworks/gw_ventana/
A Dgsc.c69 uint ui; in read_hwmon() local
76 ui = buf[0] | (buf[1]<<8) | (buf[2]<<16); in read_hwmon()
77 if (size == 2 && ui > 0x8000) in read_hwmon()
78 ui -= 0xffff; in read_hwmon()
79 if (ui == 0xffffff) in read_hwmon()
82 printf("%d\n", ui); in read_hwmon()
105 int ui = buf[0] | buf[1]<<8; in gsc_info() local
106 if (ui > 0x8000) in gsc_info()
107 ui -= 0xffff; in gsc_info()
108 printf(" board temp at %dC", ui / 10); in gsc_info()
/u-boot/lib/
A Ddisplay_options.c142 uint32_t ui[MAX_LINE_LENGTH_BYTES/sizeof(uint32_t) + 1]; in print_buffer() member
165 x = lb.ui[i] = *(volatile uint32_t *)data; in print_buffer()
/u-boot/drivers/net/qe/
A Ddm_qe_uec.c75 struct uec_inf *ui = uec->uec_info; in uec_restart_tx() local
78 cecr_subblock = ucc_fast_get_qe_cr_subblock(ui->uf_info.ucc_num); in uec_restart_tx()
89 struct uec_inf *ui = uec->uec_info; in uec_restart_rx() local
92 cecr_subblock = ucc_fast_get_qe_cr_subblock(ui->uf_info.ucc_num); in uec_restart_rx()
/u-boot/arch/arm/dts/
A Dam3517-evm.dts12 #include "am3517-evm-ui.dtsi"
/u-boot/doc/
A DREADME.distro95 ui menu.c32

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