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Searched refs:upllcsr (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h319 u32 upllcsr; /* USB PLL Control Status Register, offset 0x700 */ member
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c554 reg = readl(&scg1_regs->upllcsr); in decode_pll()
794 if (readl(&scg1_regs->upllcsr) & in scg_enable_usb_pll()

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