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Searched refs:usb1_pll_480_ctrl (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c739 if (!(readl(&usbphy->usb1_pll_480_ctrl) & PLL_USB_LOCK_MASK)) { in scg_enable_usb_pll()
772 if (readl(&usbphy->usb1_pll_480_ctrl) & in scg_enable_usb_pll()
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c1200 if ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
1207 while ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h794 u32 usb1_pll_480_ctrl; /* 0x010 */ member
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dimx-regs.h1089 u32 usb1_pll_480_ctrl; /* 0x0a0 */ member

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