| /u-boot/arch/mips/mach-mscc/ |
| A D | gpio.c | 13 u32 val0, val1; in mscc_gpio_set_alternate() local
16 val1 = readl(BASE_DEVCPU_GCB + GPIO_ALT(1)); in mscc_gpio_set_alternate()
20 val1 &= ~mask; in mscc_gpio_set_alternate()
23 val1 |= mask; in mscc_gpio_set_alternate()
26 val1 |= mask; in mscc_gpio_set_alternate()
29 val1 &= ~mask; in mscc_gpio_set_alternate()
33 writel(val1, BASE_DEVCPU_GCB + GPIO_ALT(1)); in mscc_gpio_set_alternate()
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| /u-boot/board/mscc/jr2/ |
| A D | jr2.c | 43 u32 val0, val1; in vcoreiii_gpio_set_alternate() local
57 val1 = readl(reg1); in vcoreiii_gpio_set_alternate()
60 writel(val1 & ~mask, reg1); in vcoreiii_gpio_set_alternate()
63 writel(val1 | mask, reg1); in vcoreiii_gpio_set_alternate()
66 writel(val1 | mask, reg1); in vcoreiii_gpio_set_alternate()
69 writel(val1 & ~mask, reg1); in vcoreiii_gpio_set_alternate()
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| /u-boot/drivers/net/octeontx2/ |
| A D | rvu.h | 73 static inline void st128(void *dest, u64 val0, u64 val1) in st128() argument
76 : [x0]"r"(val0), [x1]"r"(val1), [pm]"r"(dest) in st128()
87 static inline void ld128(const u64 *src, u64 *val0, u64 *val1) in ld128() argument
90 : [x0]"r"(*val0), [x1]"r"(*val1), [pm]"r"(src)); in ld128()
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| /u-boot/drivers/spi/ |
| A D | uniphier_spi.c | 305 u32 val1, val2; in uniphier_spi_set_mode() local
319 val1 = readl(priv->base + SSI_CKS); in uniphier_spi_set_mode()
325 val1 |= SSI_CKS_CKPHS | SSI_CKS_CKDLY; in uniphier_spi_set_mode()
326 val1 &= ~SSI_CKS_CKINIT; in uniphier_spi_set_mode()
336 val1 |= SSI_CKS_CKINIT | SSI_CKS_CKDLY; in uniphier_spi_set_mode()
337 val1 &= ~SSI_CKS_CKPHS; in uniphier_spi_set_mode()
342 val1 |= SSI_CKS_CKPHS | SSI_CKS_CKINIT; in uniphier_spi_set_mode()
343 val1 &= ~SSI_CKS_CKDLY; in uniphier_spi_set_mode()
348 writel(val1, priv->base + SSI_CKS); in uniphier_spi_set_mode()
352 val1 = readl(priv->base + SSI_TXWDS); in uniphier_spi_set_mode()
[all …]
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| /u-boot/drivers/ram/octeon/ |
| A D | dimm_spd_eeprom.c | 200 int val0, val1; in validate_dimm() local
216 val1 = read_spd(dimm_config, dimm_index, in validate_dimm()
218 if (val0 < 0 && val1 < 0) { in validate_dimm()
224 if (val0 == 0xff && val1 == 0xff) { in validate_dimm()
242 val1 = read_spd(dimm_config, dimm_index, in validate_dimm()
244 if (val0 < 0 && val1 < 0) { in validate_dimm()
250 if (val0 == 0xff && val1 == 0xff) { in validate_dimm()
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | dram_sun50i_h616.c | 413 val1 = readl(&ptr1[i]); in mctl_phy_read_training()
415 if (val1 - val2 <= 6) in mctl_phy_read_training()
421 val1 = readl(&ptr1[i]); in mctl_phy_read_training()
423 if (val1 - val2 <= 6) in mctl_phy_read_training()
433 if (val1 - val2 <= 6) in mctl_phy_read_training()
442 if (val1 - val2 <= 6) in mctl_phy_read_training()
503 val1 = readl(&ptr1[i]); in mctl_phy_write_training()
505 if (val1 - val2 <= 6) in mctl_phy_write_training()
513 if (val1 - val2 <= 6) in mctl_phy_write_training()
523 if (val1 - val2 <= 6) in mctl_phy_write_training()
[all …]
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| /u-boot/cmd/ti/ |
| A D | ddr3.c | 195 u32 val1, val2, val3; in ddr_memory_ecc_err() local
205 val1 = readl(addr); in ddr_memory_ecc_err()
206 val2 = val1 ^ ecc_err; in ddr_memory_ecc_err()
219 addr, val1, val2, ecc_err, val3); in ddr_memory_ecc_err()
223 val1 = readl(addr); in ddr_memory_ecc_err()
224 printf("\tECC test: addr 0x%x, read data 0x%x\n", addr, val1); in ddr_memory_ecc_err()
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| /u-boot/arch/arm/mach-omap2/ |
| A D | mem-common.c | 44 u32 val1, val2, addr; in mem_ok() local
52 val1 = readl(addr + 0x400); /* get pos A value */ in mem_ok()
56 if ((val1 != 0) || (val2 != pattern)) /* see if pos A val changed */ in mem_ok()
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| /u-boot/arch/arm/mach-imx/mx7/ |
| A D | psci-mx7.c | 328 u32 val1, val2, val3; in imx_gpcv2_set_lpm_mode() local
330 val1 = readl(GPC_IPS_BASE_ADDR + GPC_LPCR_A7_BSC); in imx_gpcv2_set_lpm_mode()
334 val1 &= ~(BM_LPCR_A7_BSC_LPM0 | BM_LPCR_A7_BSC_LPM1); in imx_gpcv2_set_lpm_mode()
335 val1 |= BM_LPCR_A7_BSC_CPU_CLK_ON_LPM; in imx_gpcv2_set_lpm_mode()
358 val1 |= A7_LPM_WAIT << BP_LPCR_A7_BSC_LPM0; in imx_gpcv2_set_lpm_mode()
359 val1 &= ~BM_LPCR_A7_BSC_CPU_CLK_ON_LPM; in imx_gpcv2_set_lpm_mode()
365 val1 |= A7_LPM_STOP << BP_LPCR_A7_BSC_LPM0; in imx_gpcv2_set_lpm_mode()
366 val1 &= ~BM_LPCR_A7_BSC_CPU_CLK_ON_LPM; in imx_gpcv2_set_lpm_mode()
378 writel(val1, GPC_IPS_BASE_ADDR + GPC_LPCR_A7_BSC); in imx_gpcv2_set_lpm_mode()
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| /u-boot/arch/x86/include/asm/ |
| A D | msr.h | 112 #define rdmsr(msr, val1, val2) \ argument
115 (void)((val1) = (u32)__val); \
252 #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2)) argument
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| /u-boot/board/solidrun/mx6cuboxi/ |
| A D | mx6cuboxi.c | 321 int val1, val2, val3; in board_type() local
348 val1 = gpio_get_value(IMX_GPIO_NR(4, 9)); in board_type()
350 if (val1 == 0) { in board_type()
359 int val1, val2; in is_rev_15_som() local
362 val1 = gpio_get_value(IMX_GPIO_NR(6, 0)); in is_rev_15_som()
365 if (val1 == 1 && val2 == 0) in is_rev_15_som()
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| /u-boot/fs/ubifs/ |
| A D | lprops.c | 58 int val1, val2, hpos; in move_up_lpt_heap() local
63 val1 = get_heap_comp_val(lprops, cat); in move_up_lpt_heap()
69 if (val2 >= val1) in move_up_lpt_heap()
95 int val1, val2, val3, cpos; in adjust_lpt_heap() local
97 val1 = get_heap_comp_val(lprops, cat); in adjust_lpt_heap()
103 if (val1 > val2) { in adjust_lpt_heap()
115 if (val1 <= val2) in adjust_lpt_heap()
129 if (val1 < val2) { in adjust_lpt_heap()
149 if (val1 < val3) { in adjust_lpt_heap()
178 int cpos, val1, val2; in add_to_lpt_heap() local
[all …]
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| /u-boot/fs/fat/ |
| A D | fat_write.c | 439 __u16 val1, val2; in set_fatent_value() local
498 val1 = cpu_to_le16(entry_value) & 0xfff; in set_fatent_value()
500 ((__u16 *)mydata->fatbuf)[off16] |= val1; in set_fatent_value()
503 val1 = cpu_to_le16(entry_value) & 0xf; in set_fatent_value()
507 ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 12); in set_fatent_value()
513 val1 = cpu_to_le16(entry_value) & 0xff; in set_fatent_value()
517 ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 8); in set_fatent_value()
523 val1 = cpu_to_le16(entry_value) & 0xfff; in set_fatent_value()
525 ((__u16 *)mydata->fatbuf)[off16] |= (val1 << 4); in set_fatent_value()
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| /u-boot/arch/arm/mach-imx/imx8/ |
| A D | cpu.c | 181 u32 val1 = 0, val2 = 0; in get_board_serial() local
190 err = sc_misc_otp_fuse_read(-1, word1, &val1); in get_board_serial()
201 serialnr->low = val1; in get_board_serial()
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| /u-boot/scripts/kconfig/ |
| A D | expr.c | 1028 tristate val1, val2; in expr_calc_value() local
1042 val1 = expr_calc_value(e->left.expr); in expr_calc_value()
1044 return EXPR_AND(val1, val2); in expr_calc_value()
1046 val1 = expr_calc_value(e->left.expr); in expr_calc_value()
1048 return EXPR_OR(val1, val2); in expr_calc_value()
1050 val1 = expr_calc_value(e->left.expr); in expr_calc_value()
1051 return EXPR_NOT(val1); in expr_calc_value()
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| /u-boot/drivers/bios_emulator/x86emu/ |
| A D | ops.c | 2604 s8 val1, val2; in x86emuOp_cmps_byte() local
2621 cmp_byte(val1, val2); in x86emuOp_cmps_byte()
2630 val1 = fetch_data_byte(M.x86.R_SI); in x86emuOp_cmps_byte()
2632 cmp_byte(val1, val2); in x86emuOp_cmps_byte()
2646 u32 val1,val2; in x86emuOp_cmps_word() local
2666 val1 = fetch_data_long(M.x86.R_SI); in x86emuOp_cmps_word()
2668 cmp_long(val1, val2); in x86emuOp_cmps_word()
2670 val1 = fetch_data_word(M.x86.R_SI); in x86emuOp_cmps_word()
2672 cmp_word((u16)val1, (u16)val2); in x86emuOp_cmps_word()
2685 cmp_long(val1, val2); in x86emuOp_cmps_word()
[all …]
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| /u-boot/arch/arm/mach-nexell/ |
| A D | clock.c | 332 unsigned int val, val1, nP, nM, nS, nK; in pll_rate() local
336 val1 = clkpwr->pllsetreg_sscg[plln]; in pll_rate()
342 nK = (val1 >> 16) & 0xFFFF; in pll_rate()
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| /u-boot/test/dm/ |
| A D | regmap.c | 142 u32 val1; in dm_test_regmap_getset() member
|