/u-boot/doc/device-tree-bindings/ram/ |
A D | fsl,mpc83xx-mem-controller.txt | 20 values: 27 values: 37 values: 41 possible values: 45 values: 78 possible values: 98 values: 103 interval; possible values: 171 values: 236 values: [all …]
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/u-boot/drivers/i2c/muxes/ |
A D | i2c-mux-gpio.c | 35 u32 *values; member 79 u32 *values; in i2c_mux_gpio_probe() local 83 values = devm_kzalloc(dev, sizeof(*mux->values) * mux->n_values, in i2c_mux_gpio_probe() 85 if (!values) { in i2c_mux_gpio_probe() 91 *(values + i) = fdtdec_get_uint(fdt, subnode, "reg", -1); in i2c_mux_gpio_probe() 95 mux->values = values; in i2c_mux_gpio_probe()
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/u-boot/drivers/clk/ |
A D | clk_vexpress_osc.c | 76 u32 values[2]; in vexpress_osc_clk_probe() local 79 err = dev_read_u32_array(dev, "freq-range", values, 2); in vexpress_osc_clk_probe() 82 priv->rate_min = values[0]; in vexpress_osc_clk_probe() 83 priv->rate_max = values[1]; in vexpress_osc_clk_probe() 85 err = dev_read_u32_array(dev, "arm,vexpress-sysreg,func", values, 2); in vexpress_osc_clk_probe() 89 if (values[0] != 1) { in vexpress_osc_clk_probe() 93 priv->osc = values[1]; in vexpress_osc_clk_probe()
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/u-boot/arch/x86/cpu/intel_common/ |
A D | lpc.c | 50 } values[4], *ptr; in lpc_common_early_init() local 55 "intel,gen-dec", (u32 *)values, in lpc_common_early_init() 56 sizeof(values) / (sizeof(u32))); in lpc_common_early_init() 68 count = count * sizeof(u32) / sizeof(values[0]); in lpc_common_early_init() 69 for (i = 0, ptr = values; i < ARRAY_SIZE(values); i++, ptr++) { in lpc_common_early_init()
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/u-boot/tools/binman/etype/ |
A D | section.py | 104 for entry in self._entries.values(): 114 todo = self._entries.values() 136 for entry in self._entries.values(): 144 for entry in self._entries.values(): 199 for entry in self._entries.values(): 259 for entry in self._entries.values(): 281 for entry in self._entries.values(): 288 for entry in self._entries.values(): 511 todo = self._entries.values() 679 for entry in to_add.values(): [all …]
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A D | cbfs.py | 183 for entry in self._cbfs_entries.values(): 232 for entry in self._cbfs_entries.values(): 242 for entry in self._cbfs_entries.values(): 254 for entry in self._cbfs_entries.values(): 264 for entry in self._cbfs_entries.values():
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A D | intel_ifwi.py | 72 for entry in self._ifwi_entries.values(): 107 for entry in self._ifwi_entries.values(): 133 for entry in self._ifwi_entries.values():
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A D | fmap.py | 48 for subentry in entries.values(): 59 for entry in entries.values():
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/u-boot/tools/scripts/ |
A D | define2mk.sed | 9 # Only process values prefixed with #define CONFIG_ 17 # drop quotes around string values 19 # Concatenate string values 21 # Assume strings as default - add quotes around values 31 # Change '1' and empty values to "y" (not perfect, but
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/u-boot/doc/device-tree-bindings/memory-controllers/ |
A D | st,stm32mp1-ddr.txt | 25 - st,ctl-reg : controleur values depending of the DDR type 27 for STM32MP15x: 25 values are requested in this order 56 for STM32MP15x: 12 values are requested in this order 70 - st,ctl-map : controleur values depending of address mapping 71 for STM32MP15x: 9 values are requested in this order 82 - st,ctl-perf : controleur values depending of performance and scheduling 83 for STM32MP15x: 17 values are requested in this order 104 - st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3) 105 for STM32MP15x: 11 values are requested in this order 119 for STM32MP15x: 10 values are requested in this order [all …]
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/u-boot/post/lib_powerpc/fpu/ |
A D | acc1.c | 30 double values[] = { 0.1e-100, 1.0, -1.0, 0.0 }; in fpu_post_test_math5() local 32 if (func (values) != 0.1e-100) { in fpu_post_test_math5()
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/u-boot/doc/device-tree-bindings/exynos/ |
A D | dwmmc.txt | 29 - samsung,timing: The timing values to be written into the 31 . It is comprised of 3 values corresponding to the 3 fileds 36 . The above 3 values are used by the clock phase shifter. 47 . Timing is comprised of 3 values as explained below
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/u-boot/test/py/tests/ |
A D | vboot_forge.py | 114 def __init__(self, values=None): argument 115 if values is None: 116 self.values = [] 118 self.values = values 123 for value in self.values: 128 self.values.append(at) 133 for value in self.values: 292 for s in strblock.values:
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/u-boot/arch/x86/include/asm/acpi/cros_ec/ |
A D | als.asl | 40 * Ambient light illuminance values are specified in lux. 42 * Display luminance adjustment values are relative percentages where 44 * negative adjustment (dimming) and values >100 indicate positive
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/u-boot/doc/device-tree-bindings/net/ |
A D | micrel-ksz90x1.txt | 3 Some boards require special tuning values, particularly when it comes to 4 clock delays. You can specify clock delay values by adding 17 The KSZ9021 hardware supports a range of skew values from negative to 18 positive, where the specific range is property dependent. All values 23 The following 4-bit values table applies to all the skew properties: 65 The KSZ9031 hardware supports a range of skew values from negative to 66 positive, where the specific range is property dependent. All values 71 The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps. 108 The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
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/u-boot/tools/patman/ |
A D | series.py | 69 values = value.split(',') 70 values = [str.strip() for str in values] 74 (commit.hash, line, values, self[name])) 75 self[name] += values 139 all_ccs = itertools.chain(cover_cc, *self._generated_cc.values())
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/u-boot/drivers/video/rockchip/ |
A D | rk_edp.c | 285 return rk_edp_dpcd_transfer(regs, addr, values, size, DPCD_READ); in rk_edp_dpcd_read() 327 u8 values[2]; in rk_edp_link_configure() local 329 values[0] = edp->link_train.link_rate; in rk_edp_link_configure() 330 values[1] = edp->link_train.lane_count; in rk_edp_link_configure() 332 return rk_edp_dpcd_write(edp->regs, DPCD_LINK_BW_SET, values, in rk_edp_link_configure() 333 sizeof(values)); in rk_edp_link_configure() 598 u8 values[3]; in rk_edp_init_training() local 601 ret = rk_edp_dpcd_read(edp->regs, DPCD_DPCD_REV, values, in rk_edp_init_training() 602 sizeof(values)); in rk_edp_init_training() 606 edp->link_train.revision = values[0]; in rk_edp_init_training() [all …]
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/u-boot/doc/device-tree-bindings/pinctrl/ |
A D | nexell,s5pxx18-pinctrl.txt | 38 Valid values for nexell,pins are: 40 Valid values for nexell,pin-function are: 44 Valid values for nexell,pin-pull are: 46 Valid values for nexell,pin-strength are:
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A D | kendryte,k210-fpioa.txt | 29 Integer values in the "pinmux" argument list are assembled as: 31 Valid values for PIN are numbers 0 through 47. 32 Valid values for DO are 0 or 1. 33 Valid values for FUNC are numbers 0 through 255. For a complete list of
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/u-boot/doc/ |
A D | README.bus_vcxk | 42 valid values for <xxxx> are: 62 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN 67 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
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A D | README.fuse | 19 Upon startup, the fusebox control IP reads the fuse values and stores them to a 56 may differ from the fusebox values. Read or sense operations can then be 57 used to get the values from the shadow cache or from the fusebox. 59 This is useful to change the behaviors linked to some cached fuse values,
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/u-boot/drivers/core/ |
A D | read.c | 377 const u32 *values; in dev_read_pci_bus_range() local 380 values = dev_read_prop(dev, "bus-range", &len); in dev_read_pci_bus_range() 381 if (!values || len < sizeof(*values) * 2) in dev_read_pci_bus_range() 384 res->start = *values++; in dev_read_pci_bus_range() 385 res->end = *values; in dev_read_pci_bus_range()
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/u-boot/lib/libavb/ |
A D | avb_cmdline.c | 98 additional_substitutions->values[n]); in avb_sub_cmdline() 405 avb_free(cmdline_subst->values[i]); in avb_free_cmdline_subst_list() 445 out_cmdline_subst->values[list_index] = avb_bin2hex(digest, digest_size); in avb_add_root_digest_substitution() 446 if (out_cmdline_subst->values[list_index] == NULL) { in avb_add_root_digest_substitution() 457 if (out_cmdline_subst->values[list_index]) { in avb_add_root_digest_substitution() 458 avb_free(out_cmdline_subst->values[list_index]); in avb_add_root_digest_substitution()
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/u-boot/tools/binman/ |
A D | fmap_util.py | 114 values = FmapHeader(FMAP_SIGNATURE, 1, 0, 0, image_size, name, len(areas)) 115 blob = _FormatBlob(FMAP_HEADER_FORMAT, FMAP_HEADER_NAMES, values)
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/u-boot/doc/driver-model/ |
A D | soc-framework.rst | 40 meaning of the values that can be returned. See drivers/soc/soc_sandbox.c for 51 for a specific SoC, and when passed to soc_device_match, the identifier values 52 for each entry in the list will be compared against the values provided by the 54 non-null values will be returned by soc_device_match.
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