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Searched refs:vdd (Results 1 – 25 of 163) sorted by relevance

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/u-boot/board/freescale/common/
A Dvid.c51 int __weak board_adjust_vdd(int vdd) in board_adjust_vdd() argument
63 static const u16 vdd[32] = { in soc_get_fuse_vid() local
91 return vdd[vid_index]; in soc_get_fuse_vid()
429 int timeout, vdd_current, vdd; in wait_for_voltage_stable() local
431 vdd = read_voltage(i2caddress); in wait_for_voltage_stable()
442 vdd = vdd_current; in wait_for_voltage_stable()
469 vid = DIV_ROUND_UP(vdd - 265, 5); in set_voltage_to_IR()
471 vid = DIV_ROUND_UP(vdd - 245, 5); in set_voltage_to_IR()
514 vdd = DIV_ROUND_UP(vdd * multiplier, MV_PER_V); in set_voltage_to_pmbus()
515 buffer[3] = vdd & 0xFF; in set_voltage_to_pmbus()
[all …]
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dsoc.c403 int vdd; in get_core_volt_from_fuse() local
423 vdd = 900; in get_core_volt_from_fuse()
426 vdd = 1000; in get_core_volt_from_fuse()
435 return vdd; in get_core_volt_from_fuse()
531 int vdd; in get_core_volt_from_fuse() local
550 vdd = 900; in get_core_volt_from_fuse()
553 vdd = 1000; in get_core_volt_from_fuse()
562 return vdd; in get_core_volt_from_fuse()
594 int vdd; in setup_chip_volt() local
598 if (vdd < 0) in setup_chip_volt()
[all …]
/u-boot/board/freescale/ls1088a/
A Dddr.c20 int vdd; in fsl_ddr_setup_0v9_volt() local
22 vdd = get_core_volt_from_fuse(); in fsl_ddr_setup_0v9_volt()
24 if (vdd < 0) in fsl_ddr_setup_0v9_volt()
27 if (vdd == 900) { in fsl_ddr_setup_0v9_volt()
/u-boot/doc/device-tree-bindings/adc/
A Dadc.txt10 - vdd-polarity-negative: positive reference Voltage has a negative polarity
16 - vdd-supply: phandle to Vdd regulator's node
20 - vdd-microvolts: positive reference Voltage value [uV]
28 vdd-microvolts = <1800000>;
57 vdd-supply = <&buck2>;
/u-boot/arch/arm/dts/
A Dstm32mp15xx-dhcor-io1v8.dtsi17 vin-supply = <&vdd>;
22 vdd-supply = <&vdd_io>;
A Dstm32mp157c-odyssey.dts39 vdd-supply = <&vdd>;
40 vdda-supply = <&vdd>;
115 vdd-supply = <&vdd>;
A Dsunxi-bananapi-m2-plus-v1.2.dtsi13 reg_vdd_cpux: vdd-cpux {
15 regulator-name = "vdd-cpux";
A Dsun50i-a64-sopine.dtsi92 regulator-name = "vdd-cpux";
108 regulator-name = "vdd-sys";
115 regulator-name = "vdd-1v8-lpddr";
133 regulator-name = "vdd-cpus";
A Dsun8i-h3-nanopi-duo2.dts50 reg_vdd_cpux: vdd-cpux-regulator {
52 regulator-name = "vdd-cpux";
78 reg_vdd_sys: vdd-sys {
80 regulator-name = "vdd-sys";
A Dsun6i-a31s-primo81.dts209 regulator-name = "vdd-cpus"; /* This is an educated guess */
222 regulator-name = "vdd-gpu";
229 regulator-name = "vdd-cpu";
236 regulator-name = "vdd-sys-dll";
266 regulator-name = "vdd-mipi-bridge";
271 vdd-mipi-bridge-supply = <&reg_eldo3>;
A Dstm32mp157c-ed1.dts106 vdd-supply = <&vdd>;
214 vdd: buck3 { label
215 regulator-name = "vdd";
332 vdd-supply = <&vdd>;
375 vqmmc-supply = <&vdd>;
A Dsun50i-h6-tanix-tx6.dts42 reg_vdd_cpu_gpu: vdd-cpu-gpu {
44 regulator-name = "vdd-cpu-gpu";
A Dstm32mp15xx-dhcor-io3v3.dtsi72 vdd: buck3 { label
73 regulator-name = "vdd";
184 vdd-supply = <&vdd>;
A Dsun6i-a31s-sinovoip-bpi-m2.dts221 regulator-name = "vdd-cpus";
228 regulator-name = "vdd-3v0";
234 regulator-name = "vdd-gpu";
241 regulator-name = "vdd-cpu";
248 regulator-name = "vdd-sys-dll";
280 regulator-name = "vdd-csi";
A Dsun6i-a31s-sina31s-core.dtsi98 regulator-name = "vdd-cpus";
111 regulator-name = "vdd-gpu";
118 regulator-name = "vdd-cpu";
125 regulator-name = "vdd-sys-dll";
A Dsun8i-a83t-tbs-a711.dts256 regulator-name = "vdd-drampll";
277 regulator-name = "vdd-cpu-A";
284 regulator-name = "vdd-cpu-B";
290 regulator-name = "vdd-gpu";
304 regulator-name = "vdd-sys";
322 regulator-name = "vdd-csi";
364 regulator-name = "vdd-cpus";
A Dstm32mp15xx-dkx.dtsi96 vdd-supply = <&vdd>;
97 vdda-supply = <&vdd>;
265 vdd-supply = <&vin>;
324 vdd: buck3 { label
325 regulator-name = "vdd";
489 vdd-supply = <&vdd>;
714 vdda-supply = <&vdd>;
/u-boot/doc/device-tree-bindings/video/
A Dtegra20-dc.txt36 - nvidia,backlight-vdd-gpios: backlight power GPIO
37 - nvidia,panel-vdd-gpios: panel power GPIO
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
83 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
/u-boot/doc/device-tree-bindings/misc/misc/
A Dfsl,mpc83xx-serdes.txt14 - vdd: determines whether 1.0V core VDD is used or not
23 vdd;
/u-boot/drivers/misc/
A Dmpc83xx_serdes.c122 bool vdd; in mpc83xx_serdes_probe() local
143 vdd = dev_read_bool(dev, "vdd"); in mpc83xx_serdes_probe()
146 if (vdd) { in mpc83xx_serdes_probe()
/u-boot/cmd/
A Dadc.c39 int ret, vss, vdd; in do_adc_info() local
60 ret = adc_vdd_value(dev, &vdd); in do_adc_info()
62 printf("vdd: %duV\n", vdd); in do_adc_info()
/u-boot/drivers/phy/
A Dphy-stm32-usbphyc.c63 struct udevice *vdd; member
245 if (usbphyc_phy->vdd) { in stm32_usbphyc_phy_power_on()
246 ret = regulator_set_enable(usbphyc_phy->vdd, true); in stm32_usbphyc_phy_power_on()
278 if (usbphyc_phy->vdd) { in stm32_usbphyc_phy_power_off()
279 ret = regulator_set_enable_if_allowed(usbphyc_phy->vdd, false); in stm32_usbphyc_phy_power_off()
392 &usbphyc_phy->vdd); in stm32_usbphyc_probe()
/u-boot/arch/powerpc/include/asm/
A Dfsl_mpc83xx_serdes.h22 extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
/u-boot/board/freescale/ls1046ardb/
A Dls1046ardb.c102 int board_setup_core_volt(u32 vdd) in board_setup_core_volt() argument
106 en_0v9 = (vdd == 900) ? true : false; in board_setup_core_volt()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dserdes.c48 void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) in fsl_setup_serdes() argument
54 if (vdd) { in fsl_setup_serdes()

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