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Searched refs:video_pll1_gnrl_ctl (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mm.c82 pll_base = &ana_pll->video_pll1_gnrl_ctl; in fracpll_configure()
636 pll_gnrl_ctl = readl(&ana_pll->video_pll1_gnrl_ctl); in decode_fracpll()
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h224 u32 video_pll1_gnrl_ctl; member

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