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Searched refs:vsel_reg (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/power/regulator/
A Dpfuze100.c35 unsigned int vsel_reg; member
64 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
75 .vsel_reg = (base), \
84 .vsel_reg = (base), \
94 .vsel_reg = (base), \
105 .vsel_reg = (base), \
116 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
127 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
138 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
325 desc->vsel_reg); in pfuze100_regulator_mode()
[all …]
A Dda9063.c53 uint vsel_reg; member
80 .vsel_reg = DA9063_REG_V##regl_name##_A, \
120 .vsel_reg = DA9063_REG_V##regl_name##_A, \
164 ret = pmic_reg_read(dev->parent, info->vsel_reg); in da9063_get_voltage()
182 return pmic_clrsetbits(dev->parent, info->vsel_reg, in da9063_set_voltage()
244 val = pmic_reg_read(dev->parent, info->vsel_reg); in buck_get_mode()
A Drk8xx.c85 u8 vsel_reg; member
282 if (info->vsel_reg == NA) in _buck_set_value()
291 __func__, uvolt, buck + 1, info->vsel_reg, mask, val); in _buck_set_value()
294 pmic_clrsetbits(pmic, info->vsel_reg, mask, val); in _buck_set_value()
298 return pmic_clrsetbits(pmic, info->vsel_reg, mask, val); in _buck_set_value()
710 if (info->vsel_reg == NA) in buck_get_value()
713 ret = pmic_reg_read(dev->parent, info->vsel_reg); in buck_get_value()
790 if (info->vsel_reg == NA) in ldo_get_value()
792 ret = pmic_reg_read(dev->parent, info->vsel_reg); in ldo_get_value()
807 if (info->vsel_reg == NA) in ldo_set_value()
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/u-boot/drivers/power/
A Dtwl4030.c112 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, in twl4030_pmrecv_vsel_cfg() argument
118 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg, in twl4030_pmrecv_vsel_cfg()
122 vsel_reg, ret); in twl4030_pmrecv_vsel_cfg()
/u-boot/include/
A Dtwl4030.h680 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,

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