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Searched refs:vset (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
A Dabb.c30 u32 vset; in abb_setup_ldovbb() local
43 vset = readl(fuse); in abb_setup_ldovbb()
44 if (!(vset & fuse_enable_mask)) in abb_setup_ldovbb()
48 vset &= fuse_vset_mask; in abb_setup_ldovbb()
49 vset >>= ffs(fuse_vset_mask) - 1; in abb_setup_ldovbb()
50 vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1; in abb_setup_ldovbb()
51 vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK; in abb_setup_ldovbb()
54 clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset); in abb_setup_ldovbb()
/u-boot/arch/arm/dts/
A Domap5.dtsi495 ti,ldovbb-vset-mask = <0x1F>;
498 * NOTE: only FBB mode used but actual vset will
525 ti,ldovbb-vset-mask = <0x1F>;
528 * NOTE: only FBB mode used but actual vset will
A Ddra7.dtsi1182 ti,ldovbb-vset-mask = <0x1F>;
1185 * NOTE: only FBB mode used but actual vset will
1215 ti,ldovbb-vset-mask = <0x1F>;
1218 * NOTE: only FBB mode used but actual vset will
1248 ti,ldovbb-vset-mask = <0x1F>;
1251 * NOTE: only FBB mode used but actual vset will
1281 ti,ldovbb-vset-mask = <0x1F>;
1284 * NOTE: only FBB mode used but actual vset will

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