| /u-boot/drivers/watchdog/ |
| A D | ulp_wdog.c | 48 writel(val, &wdog->toval); in hw_watchdog_set_timeout()
55 writel(REFRESH_WORD0, &wdog->cnt); in hw_watchdog_reset()
56 writel(REFRESH_WORD1, &wdog->cnt); in hw_watchdog_reset()
64 writel(UNLOCK_WORD0, &wdog->cnt); in hw_watchdog_init()
65 writel(UNLOCK_WORD1, &wdog->cnt); in hw_watchdog_init()
67 val = readb(&wdog->cs2); in hw_watchdog_init()
69 writeb(val, &wdog->cs2); in hw_watchdog_init()
72 writel(0, &wdog->win); in hw_watchdog_init()
84 writel(UNLOCK_WORD0, &wdog->cnt); in reset_cpu()
85 writel(UNLOCK_WORD1, &wdog->cnt); in reset_cpu()
[all …]
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| A D | imx_watchdog.c | 34 writew(wcr, &wdog->wcr); in imx_watchdog_expire_now()
35 writew(wcr, &wdog->wcr); in imx_watchdog_expire_now()
36 writew(wcr, &wdog->wcr); in imx_watchdog_expire_now()
51 imx_watchdog_expire_now(wdog, true); in reset_cpu()
56 static void imx_watchdog_reset(struct watchdog_regs *wdog) in imx_watchdog_reset() argument
59 writew(0x5555, &wdog->wsr); in imx_watchdog_reset()
60 writew(0xaaaa, &wdog->wsr); in imx_watchdog_reset()
90 writew(wcr, &wdog->wcr); in imx_watchdog_init()
91 imx_watchdog_reset(wdog); in imx_watchdog_init()
99 imx_watchdog_reset(wdog); in hw_watchdog_reset()
[all …]
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | board.c | 344 static const struct sunxi_wdog *wdog = in reset_cpu() local
345 &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; in reset_cpu()
348 writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); in reset_cpu()
349 writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl); in reset_cpu()
353 writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); in reset_cpu()
358 static const struct sunxi_wdog *wdog = in reset_cpu()
361 static const struct sunxi_wdog *wdog = in reset_cpu()
362 ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; in reset_cpu()
365 writel(WDT_CFG_RESET, &wdog->cfg); in reset_cpu()
366 writel(WDT_MODE_EN, &wdog->mode); in reset_cpu()
[all …]
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| /u-boot/board/warp7/ |
| A D | warp7.c | 136 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_late_init() local
144 set_wdog_reset(wdog); in board_late_init()
150 clrsetbits_le16(&wdog->wcr, 0, 0x10); in board_late_init()
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| /u-boot/board/google/imx8mq_phanbell/ |
| A D | imx8mq_phanbell.c | 42 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
45 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/freescale/imx8mq_evk/ |
| A D | imx8mq_evk.c | 47 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
50 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/freescale/imx8mn_evk/ |
| A D | spl.c | 79 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
83 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| A D | timer.h | 70 struct sunxi_wdog wdog; /* 0x90 */ member
81 struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */ member
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| /u-boot/board/beacon/imx8mn/ |
| A D | spl.c | 90 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
96 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/phytec/phycore_imx8mm/ |
| A D | spl.c | 81 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
85 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/freescale/imx8mp_evk/ |
| A D | imx8mp_evk.c | 37 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
41 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/beacon/imx8mm/ |
| A D | spl.c | 76 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
80 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/phytec/phycore_imx8mp/ |
| A D | spl.c | 93 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
97 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/arch/arm/include/asm/arch-mx7/ |
| A D | sys_proto.h | 10 void set_wdog_reset(struct wdog_regs *wdog);
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| /u-boot/board/freescale/imx8mm_evk/ |
| A D | spl.c | 81 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
85 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/technexion/pico-imx8mq/ |
| A D | pico-imx8mq.c | 45 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
48 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/technexion/pico-imx7d/ |
| A D | pico-imx7d.c | 207 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_late_init() local
211 set_wdog_reset(wdog); in board_late_init()
217 clrsetbits_le16(&wdog->wcr, 0, 0x10); in board_late_init()
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| /u-boot/arch/arm/mach-imx/mx7/ |
| A D | soc.c | 388 void set_wdog_reset(struct wdog_regs *wdog) in set_wdog_reset() argument
390 u32 reg = readw(&wdog->wcr); in set_wdog_reset()
396 reg = readw(&wdog->wcr); in set_wdog_reset()
403 writew(reg, &wdog->wcr); in set_wdog_reset()
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| /u-boot/drivers/mmc/ |
| A D | davinci_mmc.c | 80 uint wdog = WATCHDOG_COUNT; local
82 while (--wdog && ((get_val(®s->mmcst1) & status) != status))
88 if (wdog == 0)
97 uint wdog = WATCHDOG_COUNT; local
99 while (--wdog && (get_val(®s->mmcst1) & MMCST1_BUSY))
102 if (wdog == 0)
112 uint wdog = WATCHDOG_COUNT; local
115 while (wdog--) {
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| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| A D | sys_proto.h | 11 void set_wdog_reset(struct wdog_regs *wdog);
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| /u-boot/board/toradex/verdin-imx8mm/ |
| A D | spl.c | 93 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
97 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/arch/arm/mach-bcm283x/include/mach/ |
| A D | wdog.h | 18 u32 wdog; member
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| /u-boot/board/gateworks/venice/ |
| A D | spl.c | 74 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_early_init_f() local
78 set_wdog_reset(wdog); in board_early_init_f()
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| /u-boot/board/compulab/cl-som-imx7/ |
| A D | cl-som-imx7.c | 305 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in cl_som_imx7_setup_wdog() local
308 set_wdog_reset(wdog); in cl_som_imx7_setup_wdog()
313 clrsetbits_le16(&wdog->wcr, 0, 0x10); in cl_som_imx7_setup_wdog()
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| /u-boot/board/freescale/mx7dsabresd/ |
| A D | mx7dsabresd.c | 294 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; in board_late_init() local
298 set_wdog_reset(wdog); in board_late_init()
304 clrsetbits_le16(&wdog->wcr, 0, 0x10); in board_late_init()
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