Searched refs:win_ctrl_reg (Results 1 – 2 of 2) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_init.c | 143 u32 win_ctrl_reg, num_of_win_regs; in ddr3_restore_and_set_final_windows() local
152 win_ctrl_reg = REG_XBAR_WIN_16_CTRL_ADDR; in ddr3_restore_and_set_final_windows()
155 win_ctrl_reg = REG_XBAR_WIN_4_CTRL_ADDR; in ddr3_restore_and_set_final_windows()
161 reg_write((win_ctrl_reg + 0x4 * ui), win_backup[ui]); in ddr3_restore_and_set_final_windows()
202 u32 win_ctrl_reg, win_base_reg, win_remap_reg; in ddr3_save_and_set_training_windows() local
209 win_ctrl_reg = REG_XBAR_WIN_16_CTRL_ADDR; in ddr3_save_and_set_training_windows()
215 win_ctrl_reg = REG_XBAR_WIN_4_CTRL_ADDR; in ddr3_save_and_set_training_windows()
228 win_backup[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
252 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
|
| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | mv_ddr_plat.c | 1103 u32 win_ctrl_reg, num_of_win_regs; in ddr3_restore_and_set_final_windows() local
1107 win_ctrl_reg = REG_XBAR_WIN_4_CTRL_ADDR; in ddr3_restore_and_set_final_windows()
1112 reg_write((win_ctrl_reg + 0x4 * ui), win[ui]); in ddr3_restore_and_set_final_windows()
1140 u32 win_ctrl_reg, win_base_reg, win_remap_reg; in ddr3_save_and_set_training_windows() local
1142 win_ctrl_reg = REG_XBAR_WIN_4_CTRL_ADDR; in ddr3_save_and_set_training_windows()
1165 win[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
1189 reg_write(win_ctrl_reg + win_jump_index * tmp_count, in ddr3_save_and_set_training_windows()
|
Completed in 6 milliseconds