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Searched refs:wl_min_phase (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_hw_training.c492 DEBUG_MAIN_FULL_C("Min WL Phase: ", dram_info->wl_min_phase, 2); in ddr3_set_performance_params()
504 tmp1 = (dram_info->rl_max_phase - dram_info->wl_min_phase) / 2 + in ddr3_set_performance_params()
505 (((dram_info->rl_max_phase - dram_info->wl_min_phase) % 2) > in ddr3_set_performance_params()
A Dddr3_write_leveling.c427 dram_info->wl_min_phase = 10; in ddr3_wl_supplement()
444 if (phase < dram_info->wl_min_phase) in ddr3_wl_supplement()
445 dram_info->wl_min_phase = phase; in ddr3_wl_supplement()
A Dddr3_hw_training.h264 u32 wl_min_phase; member

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