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Searched refs:word (Results 1 – 25 of 172) sorted by relevance

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/u-boot/arch/arm/include/asm/arch-sunxi/
A Dboot0.h22 .word 0xe580d000 // str sp, [r0]
24 .word 0xe10fe000 // mrs lr, CPSR
33 .word 0xe5810000 // str r0, [r1]
34 .word 0xf57ff04f // dsb sy
35 .word 0xf57ff06f // isb sy
39 .word 0xf57ff06f // isb sy
40 .word 0xe320f003 // wfi
41 .word 0xeafffffd // b @wfi
48 .word CONFIG_SPL_TEXT_BASE
50 .word CONFIG_SYS_TEXT_BASE
[all …]
/u-boot/arch/arm/mach-at91/arm920t/
A Dlowlevel_init.S117 .word CONFIG_SYS_SDRAM
121 .word CONFIG_SYS_SDRAM
123 .word CONFIG_SYS_SDRAM
125 .word CONFIG_SYS_SDRAM
127 .word CONFIG_SYS_SDRAM
129 .word CONFIG_SYS_SDRAM
131 .word CONFIG_SYS_SDRAM
133 .word CONFIG_SYS_SDRAM
135 .word CONFIG_SYS_SDRAM
143 .word CONFIG_SYS_SDRAM
[all …]
/u-boot/arch/arm/mach-at91/arm926ejs/
A Dlowlevel_init.S160 .word AT91_ASM_WDT_MR
164 .word AT91_ASM_PIOD_PDR
166 .word AT91_ASM_PIOD_PUDR
168 .word AT91_ASM_PIOD_ASR
172 .word AT91_ASM_PIOC_PDR
174 .word AT91_ASM_PIOC_PUDR
181 .word AT91_ASM_SMC_MODE0
194 .word AT91_ASM_SDRAMC_MR
237 .word AT91_ASM_RSTC_MR
242 .word 0x1FF
[all …]
/u-boot/arch/arc/cpu/arcv2/
A Divt.S9 .word _start /* 0x00 - Reset */
10 .word memory_error /* 0x01 - Memory Error */
11 .word instruction_error /* 0x02 - Instruction Error */
15 .word EV_TLBMissI /* 0x04 - Intruction TLB miss */
16 .word EV_TLBMissD /* 0x05 - Data TLB miss */
19 .word EV_SWI /* 0x08 - Software Interrupt */
20 .word EV_Trap /* 0x09 - Trap */
22 .word EV_DivZero /* 0x0B - Division by Zero */
25 .word 0 /* 0x0E - Unused */
26 .word 0 /* 0x0F - Unused */
[all …]
/u-boot/arch/arm/mach-omap2/omap3/
A Dlowlevel_init.S152 .word CM_CLKEN_PLL
162 .word CM_CLKSEL_GFX
402 .word 50, 0, 0, 1
404 .word 600, 12, 0, 1
406 .word 125, 3, 0, 1
408 .word 300, 12, 0, 1
410 .word 125, 7, 0, 1
414 .word 130, 2, 0, 1
416 .word 20, 0, 0, 1
420 .word 10, 0, 0, 1
[all …]
/u-boot/include/asm-generic/bitops/
A D__ffs.h17 if ((word & 0xffffffff) == 0) { in __ffs()
19 word >>= 32; in __ffs()
22 if ((word & 0xffff) == 0) { in __ffs()
24 word >>= 16; in __ffs()
26 if ((word & 0xff) == 0) { in __ffs()
28 word >>= 8; in __ffs()
30 if ((word & 0xf) == 0) { in __ffs()
32 word >>= 4; in __ffs()
34 if ((word & 0x3) == 0) { in __ffs()
36 word >>= 2; in __ffs()
[all …]
A D__fls.h17 if (!(word & (~0ul << 32))) { in __fls()
19 word <<= 32; in __fls()
22 if (!(word & (~0ul << (BITS_PER_LONG-16)))) { in __fls()
24 word <<= 16; in __fls()
26 if (!(word & (~0ul << (BITS_PER_LONG-8)))) { in __fls()
28 word <<= 8; in __fls()
30 if (!(word & (~0ul << (BITS_PER_LONG-4)))) { in __fls()
32 word <<= 4; in __fls()
34 if (!(word & (~0ul << (BITS_PER_LONG-2)))) { in __fls()
36 word <<= 2; in __fls()
[all …]
/u-boot/arch/arm/include/asm/arch-aspeed/
A Dboot0.h12 .word 0x0 /* key location */
13 .word 0x0 /* start address of image */
14 .word 0xfc00 /* maximum image size: 63KB */
15 .word 0x0 /* signature address */
16 .word 0x0 /* header revision ID low */
17 .word 0x0 /* header revision ID high */
18 .word 0x0 /* reserved */
19 .word 0x0 /* checksum */
20 .word 0x0 /* BL2 secure header */
21 .word 0x0 /* public key or digest offset for BL2 */
/u-boot/arch/arm/cpu/armv8/
A Dfel_utils.S68 .word 0xe5901008 // ldr r1, [r0, #8]
69 .word 0xe129f001 // msr CPSR_fc, r1
70 .word 0xf57ff06f // isb
71 .word 0xe590d000 // ldr sp, [r0]
72 .word 0xe590e004 // ldr lr, [r0, #4]
73 .word 0xe5901010 // ldr r1, [r0, #16]
74 .word 0xee0c1f10 // mcr 15, 0, r1, cr12, cr0, {0} ; VBAR
75 .word 0xe590100c // ldr r1, [r0, #12]
76 .word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR
77 .word 0xf57ff06f // isb
[all …]
/u-boot/arch/arm/mach-rmobile/include/mach/
A Dboot0.h13 .word 0x0badc0d3;
14 .word 0x0badc0d3;
15 .word 0x0badc0d3;
16 .word 0x0badc0d3;
17 .word 0x0badc0d3;
18 .word 0x0badc0d3;
19 .word 0x0badc0d3;
20 .word 0x0badc0d3;
/u-boot/drivers/misc/imx8/
A Dfuse.c34 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
36 return fuse_sense(bank, word, val); in fuse_read()
39 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense() argument
48 arm_smccc_smc(FSL_SIP_OTP_READ, (unsigned long)word, 0, 0, in fuse_sense()
55 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog() argument
65 if (word >= FSL_QXP_FUSE_GAP_START && in fuse_prog()
66 word <= FSL_QXP_FUSE_GAP_END) { in fuse_prog()
72 if ((word >= FSL_ECC_WORD_START_1 && word <= FSL_ECC_WORD_END_1) || in fuse_prog()
73 (word >= FSL_ECC_WORD_START_2 && word <= FSL_ECC_WORD_END_2)) { in fuse_prog()
85 arm_smccc_smc(FSL_SIP_OTP_WRITE, (unsigned long)word, in fuse_prog()
[all …]
/u-boot/arch/arm/mach-exynos/
A Dsec_boot.S76 .word 0x0 @ REG0: RESUME_ADDR
77 .word 0x0 @ REG1: RESUME_FLAG
78 .word 0x0 @ REG2
79 .word 0x0 @ REG3
81 .word 0x0 @ REG4: SWITCH_ADDR
83 .word 0x0 @ REG5: CPU1_BOOT_REG
84 .word 0x0 @ REG6
86 .word 0x0 @ REG7: REG_C2_ADDR
88 .word 0x1 @ CPU0_STATE : RESET
93 .word 0x0 @ CPU0 - GICD_IGROUPR0
[all …]
/u-boot/arch/x86/cpu/
A Dstart16.S52 .word 0x10 /* segment */
55 .word 0 /* limit */
64 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
81 .word 0x0000 /* limit_low */
82 .word 0x0000 /* base_low */
89 .word 0x0000 /* limit_low */
90 .word 0x0000 /* base_low */
103 .word 0xffff /* limit_low */
104 .word 0x0000 /* base_low */
117 .word 0xffff /* limit_low */
[all …]
A Dstart.S226 .word 0 /* limit */
257 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
274 .word 0x0000 /* limit_low */
275 .word 0x0000 /* base_low */
282 .word 0x0000 /* limit_low */
283 .word 0x0000 /* base_low */
296 .word 0xffff /* limit_low */
297 .word 0x0000 /* base_low */
310 .word 0xffff /* limit_low */
311 .word 0x0000 /* base_low */
/u-boot/drivers/misc/
A Dfsl_iim.c93 u32 word[0x100]; member
107 word >= ARRAY_SIZE((*regs)->bank[0].word) || in prepare_access()
143 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
153 *val = iim_read32(&regs->bank[bank].word[word]); in fuse_read()
167 iim_write32(&regs->ua, bank << 3 | word >> 5); in direct_access()
168 iim_write32(&regs->la, (word << 3 | bit) & 0xff); in direct_access()
177 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense() argument
235 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog() argument
248 ret = prog_bit(regs, bank, word, bit); in fuse_prog()
259 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override() argument
[all …]
A Dstm32mp_fuse.c21 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
33 ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, in fuse_read()
49 ret = misc_read(dev, -word, val, 1); in fuse_read()
66 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog() argument
78 ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET, in fuse_prog()
93 ret = misc_write(dev, word, &val, 1); in fuse_prog()
110 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense() argument
137 ret = misc_read(dev, word, val, 1); in fuse_sense()
154 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override() argument
166 ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, in fuse_override()
[all …]
A Dmxc_ocotp.c235 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
247 phy_word = fuse_word_physical(bank, word); in fuse_read()
316 u32 addr = bank << 2 | word; in setup_direct_access()
322 word += 4; in setup_direct_access()
324 addr = bank << 3 | word; in setup_direct_access()
333 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense() argument
379 ret = fuse_sense(bank, word, &val); in prepare_write()
394 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog() argument
403 setup_direct_access(regs, bank, word, true); in fuse_prog()
405 switch (word) { in fuse_prog()
[all …]
/u-boot/cmd/
A Dfuse.c48 u32 bank, word, cnt, val; in do_fuse() local
55 strtou32(argv[1], 0, &word)) in do_fuse()
65 for (i = 0; i < cnt; i++, word++) { in do_fuse()
67 printf("\nWord 0x%.8x:", word); in do_fuse()
69 ret = fuse_read(bank, word, &val); in do_fuse()
83 for (i = 0; i < cnt; i++, word++) { in do_fuse()
85 printf("\nWord 0x%.8x:", word); in do_fuse()
87 ret = fuse_sense(bank, word, &val); in do_fuse()
103 bank, word, val); in do_fuse()
106 ret = fuse_prog(bank, word, val); in do_fuse()
[all …]
/u-boot/arch/arm/cpu/arm926ejs/spear/
A Dspr_lowlevel_init.S136 .word 0xfca00000
138 .word 0xfca8000C
140 .word 0xfca80008
142 .word 0xfca80018
144 .word 0xfca80014
146 .word 0xff000000
148 .word 0x1C0A
150 .word 0x1C0E
152 .word 0x1C06
155 .word 0x9999
[all …]
/u-boot/arch/arm/cpu/armv7/
A Dpsci.S110 .word psci_cpu_off
112 .word psci_cpu_on
114 .word psci_migrate
116 .word psci_version
120 .word psci_cpu_off
122 .word psci_cpu_on
126 .word psci_migrate
132 .word psci_system_off
136 .word psci_features
151 .word 0
[all …]
/u-boot/arch/riscv/include/asm/
A Dbitops.h117 static inline unsigned long ffz(unsigned long word) in ffz() argument
121 word = ~word; in ffz()
123 if (word & 0x0000ffff) { in ffz()
124 k -= 16; word <<= 16; in ffz()
126 if (word & 0x00ff0000) { in ffz()
127 k -= 8; word <<= 8; in ffz()
129 if (word & 0x0f000000) { in ffz()
130 k -= 4; word <<= 4; in ffz()
132 if (word & 0x30000000) { in ffz()
133 k -= 2; word <<= 2; in ffz()
[all …]
/u-boot/arch/sandbox/include/asm/
A Dbitops.h122 static inline unsigned long ffz(unsigned long word) in ffz() argument
126 word = ~word; in ffz()
128 if (word & 0x0000ffff) { in ffz()
129 k -= 16; word <<= 16; in ffz()
131 if (word & 0x00ff0000) { in ffz()
132 k -= 8; word <<= 8; in ffz()
134 if (word & 0x0f000000) { in ffz()
135 k -= 4; word <<= 4; in ffz()
137 if (word & 0x30000000) { in ffz()
138 k -= 2; word <<= 2; in ffz()
[all …]
/u-boot/arch/nds32/include/asm/
A Dbitops.h135 static inline unsigned long ffz(unsigned long word) in ffz() argument
139 word = ~word; in ffz()
141 if (word & 0x0000ffff) { in ffz()
142 k -= 16; word <<= 16; in ffz()
144 if (word & 0x00ff0000) { in ffz()
145 k -= 8; word <<= 8; in ffz()
147 if (word & 0x0f000000) { in ffz()
148 k -= 4; word <<= 4; in ffz()
150 if (word & 0x30000000) { in ffz()
151 k -= 2; word <<= 2; in ffz()
[all …]
/u-boot/drivers/net/
A Dsmc91111.h115 word *__b2; \
116 __b2 = (word *) b; \
132 word *__b2; \
133 __b2 = (word *) b; \
188 word *__b2; \
189 __b2 = (word *) b; \
203 word *__b2; \
224 word *__b2 = (word *)(b); \
241 word *__b2 = (word *)(b); \
282 word *__b2; \
[all …]
/u-boot/arch/arm/mach-nexell/include/mach/
A Dboot0.h23 .word (_end - _start) + 20 * 1024 /* 0x50: load size
26 .word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x58: load address */
27 .word 0x00000000
28 .word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x60: start address */

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