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Searched refs:writel_with_flush (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ata/
A Dahci.c40 #define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0) macro
150 writel_with_flush(tmp | HOST_RESET, host_ctl_reg); in ahci_reset()
198 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL); in ahci_host_init()
200 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL); in ahci_host_init()
247 writel_with_flush(tmp, port_mmio + PORT_CMD); in ahci_host_init()
264 writel_with_flush(cmd, port_mmio + PORT_CMD); in ahci_host_init()
611 writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR); in ahci_port_start()
614 writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR); in ahci_port_start()
621 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX | in ahci_port_start()
667 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE); in ahci_device_data_io()
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A Ddwc_ahsata.c87 #define writel_with_flush(a, b) do { writel(a, b); readl(b); } while (0) macro
133 writel_with_flush(tmp | SATA_HOST_GHC_HR, &host_mmio->ghc); in ahci_host_init()
148 writel_with_flush(SATA_HOST_GHC_AE, &host_mmio->ghc); in ahci_host_init()
151 writel_with_flush((1 << num_ports) - 1, &host_mmio->pi); in ahci_host_init()
188 writel_with_flush(tmp, &port_mmio->cmd); in ahci_host_init()
408 writel_with_flush(1 << cmd_slot, &port_mmio->ci); in ahci_exec_ata_cmd()
488 writel_with_flush(0x00004444, &port_mmio->dmacr); in ahci_port_start()
490 writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb); in ahci_port_start()
491 writel_with_flush(pp->rx_fis, &port_mmio->fb); in ahci_port_start()
494 writel_with_flush((SATA_PORT_CMD_FRE | readl(&port_mmio->cmd)), in ahci_port_start()
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