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Searched refs:writelrb (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/cpu/pxa/
A Dpxa2xx.c62 writelrb(CONFIG_SYS_MSC0_VAL, MSC0); in pxa2xx_dram_init()
63 writelrb(CONFIG_SYS_MSC1_VAL, MSC1); in pxa2xx_dram_init()
64 writelrb(CONFIG_SYS_MSC2_VAL, MSC2); in pxa2xx_dram_init()
70 writelrb(CONFIG_SYS_MECR_VAL, MECR); in pxa2xx_dram_init()
72 writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0); in pxa2xx_dram_init()
80 writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0); in pxa2xx_dram_init()
82 writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); in pxa2xx_dram_init()
108 writelrb(tmp, MDREFR); in pxa2xx_dram_init()
134 writelrb(CONFIG_SYS_MDCNFG_VAL & in pxa2xx_dram_init()
160 writelrb(tmp, MDCNFG); in pxa2xx_dram_init()
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