/xen/xen/arch/x86/ |
A D | xen.lds.S | 360 ASSERT(__2M_rwdata_end <= XEN_VIRT_END - XEN_VIRT_START + __XEN_VIRT_START - 370 ASSERT(IS_ALIGNED(_start, MB(2)), "_start misaligned") 380 ASSERT(IS_ALIGNED(cpu0_stack, STACK_SIZE), "cpu0_stack misaligned") 382 ASSERT(IS_ALIGNED(__init_begin, PAGE_SIZE), "__init_begin misaligned") 383 ASSERT(IS_ALIGNED(__init_end, PAGE_SIZE), "__init_end misaligned") 385 ASSERT(IS_ALIGNED(trampoline_start, 4), "trampoline_start misaligned") 386 ASSERT(IS_ALIGNED(trampoline_end, 4), "trampoline_end misaligned") 387 ASSERT(IS_ALIGNED(__bss_start, 8), "__bss_start misaligned") 388 ASSERT(IS_ALIGNED(__bss_end, 8), "__bss_end misaligned") 392 ASSERT((wakeup_stack - wakeup_stack_start) >= WAKEUP_STACK_MIN, [all …]
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A D | i387.c | 28 ASSERT(v->arch.xsave_area); in fpu_xrstor() 34 ASSERT(ok); in fpu_xrstor() 37 ASSERT(ok); in fpu_xrstor() 140 ASSERT(mask); in fpu_xsave() 141 ASSERT(v->arch.xsave_area); in fpu_xsave() 147 ASSERT(ok); in fpu_xsave() 150 ASSERT(ok); in fpu_xsave() 213 ASSERT(!is_idle_vcpu(v)); in vcpu_restore_fpu_nonlazy() 252 ASSERT(!is_idle_vcpu(v)); in vcpu_restore_fpu_lazy() 260 ASSERT(!v->arch.fully_eager_fpu); in vcpu_restore_fpu_lazy() [all …]
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A D | domain_page.c | 54 ASSERT(cr3_pa(read_cr3()) == __pa(idle_pg_table)); in mapcache_current_vcpu() 101 ASSERT(idx < dcache->entries); in map_domain_page() 103 ASSERT(hashent->refcnt); in map_domain_page() 104 ASSERT(mfn_eq(l1e_get_mfn(MAPCACHE_L1ENT(idx)), mfn)); in map_domain_page() 190 ASSERT(v && is_pv_vcpu(v)); in unmap_domain_page() 193 ASSERT(dcache->inuse); in unmap_domain_page() 203 ASSERT(hashent->mfn == mfn); in unmap_domain_page() 204 ASSERT(hashent->refcnt); in unmap_domain_page() 239 ASSERT(is_pv_domain(d)); in mapcache_domain_init() 307 ASSERT(!in_irq() && in map_domain_page_global() [all …]
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/xen/xen/arch/arm/ |
A D | gic.c | 75 ASSERT(!local_irq_is_enabled()); in gic_save_state() 76 ASSERT(!is_idle_vcpu(v)); in gic_save_state() 89 ASSERT(!local_irq_is_enabled()); in gic_restore_state() 90 ASSERT(!is_idle_vcpu(v)); in gic_restore_state() 106 ASSERT(spin_is_locked(&desc->lock)); in gic_set_irq_type() 107 ASSERT(type != IRQ_TYPE_INVALID); in gic_set_irq_type() 143 ASSERT(virq >= 32); in gic_route_irq_to_guest() 144 ASSERT(virq < vgic_num_irqs(d)); in gic_route_irq_to_guest() 145 ASSERT(!is_lpi(virq)); in gic_route_irq_to_guest() 177 ASSERT(!is_lpi(virq)); in gic_remove_irq_from_guest() [all …]
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A D | gic-vgic.c | 37 ASSERT(!local_irq_is_enabled()); in gic_set_lr() 53 ASSERT(spin_is_locked(&v->arch.vgic.lock)); in gic_add_to_lr_pending() 71 ASSERT(spin_is_locked(&v->arch.vgic.lock)); in gic_remove_from_lr_pending() 84 ASSERT(spin_is_locked(&v->arch.vgic.lock)); in gic_raise_inflight_irq() 170 ASSERT(!local_irq_is_enabled()); in gic_update_one_lr() 184 ASSERT(is_lpi(irq)); in gic_update_one_lr() 285 ASSERT(!local_irq_is_enabled()); in gic_restore_pending_irqs() 365 ASSERT(v == current); in vgic_vcpu_pending_irq() 397 ASSERT(!local_irq_is_enabled()); in vgic_sync_to_lrs() 421 ASSERT(!v && virq >= 32); in vgic_get_hw_irq_desc() [all …]
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A D | device.c | 33 ASSERT(dev != NULL); in device_init() 45 ASSERT(desc->init != NULL); in device_init() 64 ASSERT(desc->init != NULL); in acpi_device_init() 76 ASSERT(dev != NULL); in device_get_class()
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A D | p2m.c | 325 ASSERT(level < 3); in p2m_next_level() 476 ASSERT(fdom != NULL); in p2m_get_page_from_gfn() 477 ASSERT(fdom != d); in p2m_get_page_from_gfn() 721 ASSERT(p2m_is_valid(pte)); in p2m_put_l3_page() 781 ASSERT(mfn_valid(mfn)); in p2m_free_entry() 807 ASSERT(level < target); in p2m_split_superpage() 982 ASSERT(level == target); in __p2m_set_entry() 1732 ASSERT(v == current); in p2m_flush_vm() 1787 ASSERT(v == current); in p2m_set_way_flush() 1801 ASSERT(v == current); in p2m_toggle_cache() [all …]
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/xen/xen/arch/x86/mm/shadow/ |
A D | private.h | 509 ASSERT(mfn_valid(smfn)); in sh_get_ref() 510 ASSERT(sp->u.sh.head); in sh_get_ref() 542 ASSERT(mfn_valid(smfn)); in sh_put_ref() 543 ASSERT(sp->u.sh.head); in sh_put_ref() 598 ASSERT(!p || p->u.sh.head); in prev_pinned_shadow() 619 ASSERT(mfn_valid(smfn)); in sh_pin() 624 ASSERT(sp[0]->u.sh.head); in sh_pin() 635 ASSERT(!sp[i]->u.sh.head); in sh_pin() 667 ASSERT(mfn_valid(smfn)); in sh_unpin() 671 ASSERT(sp->u.sh.head); in sh_unpin() [all …]
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A D | none.c | 6 ASSERT(is_pv_domain(d)); in _enable_log_dirty() 12 ASSERT(is_pv_domain(d)); in _disable_log_dirty() 18 ASSERT(is_pv_domain(d)); in _clean_dirty_bitmap() 82 ASSERT(is_pv_vcpu(v)); in shadow_vcpu_init()
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A D | multi.c | 147 ASSERT(res == 1); in set_shadow_status() 417 ASSERT(next); in sh_next_page() 896 ASSERT(sl4e != NULL); in shadow_set_l4e() 951 ASSERT(sl3e != NULL); in shadow_set_l3e() 1010 ASSERT(sl2e != NULL); in shadow_set_l2e() 1183 ASSERT(sl1e != NULL); in shadow_set_l1e() 1641 ASSERT(sl4e != NULL); in shadow_get_and_create_l3e() 1852 ASSERT(sp->u.sh.head); in sh_destroy_l4_shadow() 1882 ASSERT(sp->u.sh.head); in sh_destroy_l3_shadow() 1918 ASSERT(sp->u.sh.head); in sh_destroy_l2_shadow() [all …]
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A D | common.c | 240 ASSERT(mfn_valid(gmfn)); in _sh_resync_l1() 255 ASSERT(mfn_valid(smfn)); in sh_remove_write_access_from_sl1p() 256 ASSERT(mfn_valid(gmfn)); in sh_remove_write_access_from_sl1p() 702 ASSERT(mfn_valid(gmfn)); in shadow_promote() 1334 ASSERT(sp); in shadow_set_allocation() 1508 ASSERT(t); in shadow_hash_lookup() 1561 ASSERT(t); in shadow_hash_insert() 1586 ASSERT(t); in shadow_hash_delete() 2133 ASSERT(mfn_valid(pmfn)); in sh_remove_shadow_via_pointer() 2225 ASSERT(!(all && fast)); in sh_remove_shadows() [all …]
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/xen/xen/common/ |
A D | preempt.c | 36 ASSERT(!preempt_count()); in ASSERT_NOT_IN_ATOMIC() 37 ASSERT(!in_irq()); in ASSERT_NOT_IN_ATOMIC() 38 ASSERT(local_irq_is_enabled()); in ASSERT_NOT_IN_ATOMIC()
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A D | hypfs.c | 39 ASSERT(this_cpu(hypfs_locked) != hypfs_write_locked); in hypfs_read_lock() 47 ASSERT(this_cpu(hypfs_locked) == hypfs_unlocked); in hypfs_write_lock() 218 ASSERT(this_cpu(hypfs_locked) != hypfs_unlocked); in hypfs_read_dir() 243 ASSERT(e_len <= size); in hypfs_read_dir() 255 ASSERT(this_cpu(hypfs_locked) != hypfs_unlocked); in hypfs_read_leaf() 299 ASSERT(this_cpu(hypfs_locked) == hypfs_write_locked); in hypfs_write_leaf() 336 ASSERT(this_cpu(hypfs_locked) == hypfs_write_locked); in hypfs_write_bool() 337 ASSERT(leaf->e.type == XEN_HYPFS_TYPE_BOOL && in hypfs_write_bool() 359 ASSERT(this_cpu(hypfs_locked) == hypfs_write_locked); in hypfs_write_custom() 393 ASSERT(entry->max_size); in hypfs_write()
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A D | argo.c | 361 ASSERT(LOCKING_Read_rings_L2(d)); in find_ring_info() 392 ASSERT(LOCKING_Read_rings_L2(d)); in find_ring_info_by_match() 413 ASSERT(LOCKING_send_L2(d)); in find_send_info() 991 ASSERT(LOCKING_Read_L1); in wildcard_pending_list_remove() 1010 ASSERT(LOCKING_Read_L1); in wildcard_pending_list_insert() 1046 ASSERT(LOCKING_Read_L1); in pending_notify() 1187 ASSERT(LOCKING_Write_L1); in wildcard_rings_pending_remove() 1274 ASSERT(LOCKING_Write_L1); in partner_rings_remove() 1323 ASSERT(LOCKING_Read_L1); in fill_ring_data() 1466 ASSERT(!ring_info->mfns); in find_ring_mfns() [all …]
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A D | softirq.c | 34 ASSERT(!rcu_allowed || rcu_quiesce_allowed()); in __do_softirq() 67 ASSERT(!in_irq() && local_irq_is_enabled()); in process_pending_softirqs() 79 ASSERT(nr < NR_SOFTIRQS); in open_softirq() 131 ASSERT(per_cpu(batching, this_cpu)); in cpu_raise_softirq_batch_finish()
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A D | vmap.c | 27 ASSERT(!vm_base[type]); in vm_init_type() 58 ASSERT((t >= VMAP_DEFAULT) && (t < VMAP_REGION_NR)); in vm_alloc() 67 ASSERT(vm_low[t] == vm_top[t] || !test_bit(vm_low[t], vm_bitmap(t))); in vm_alloc() 132 ASSERT(!test_bit(bit, vm_bitmap(t))); in vm_alloc() 134 ASSERT(bit == vm_top[t]); in vm_alloc() 249 ASSERT(size); in vmalloc_type() 318 ASSERT(pages); in vfree() 324 ASSERT(page); in vfree()
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/xen/xen/common/sched/ |
A D | credit2.c | 894 ASSERT(rcpu != cpu); in cpu_runqueue_siblings_match() 1127 ASSERT(svc->rqd == NULL); in runq_assign() 1137 ASSERT(!unit_on_runq(svc)); in _runq_deassign() 1392 ASSERT(svc->avgload >= 0); in update_svc_load() 1432 ASSERT(!unit_on_runq(svc)); in runq_insert() 1468 ASSERT(unit_on_runq(svc)); in runq_remove() 1596 ASSERT(new->rqd == rqd); in runq_tickle() 1725 ASSERT(i != cpu); in runq_tickle() 1844 ASSERT(snext->credit > 0); in reset_credit() 3959 ASSERT(spc); in init_pdata() [all …]
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/xen/xen/arch/x86/mm/ |
A D | p2m-pt.c | 105 ASSERT(!level); in p2m_type_to_flags() 256 ASSERT(rc && mfn_valid(mfn)); in p2m_next_level() 405 ASSERT(!err); in do_recalc() 453 ASSERT(!err); in do_recalc() 487 ASSERT(order > PAGE_ORDER_4K); in check_entry() 497 ASSERT(mfn_valid(mfn)); in check_entry() 571 ASSERT(p2m_entry); in p2m_pt_set_entry() 620 ASSERT(p2m_entry); in p2m_pt_set_entry() 643 ASSERT(p2m_entry); in p2m_pt_set_entry() 879 ASSERT(hap_enabled(d)); in p2m_pt_change_entry_type_global() [all …]
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A D | p2m-ept.c | 325 ASSERT(next_level); in ept_next_level() 359 ASSERT(rc == 0); in ept_next_level() 402 ASSERT(rc == 0); in ept_invalidate_emt_subtree() 454 ASSERT(wrc == 0); in ept_invalidate_emt_range() 461 ASSERT(i == target); in ept_invalidate_emt_range() 476 ASSERT(wrc == 0); in ept_invalidate_emt_range() 690 ASSERT(ept); in ept_set_entry() 777 ASSERT(rc == 0); in ept_set_entry() 785 ASSERT(i == target); in ept_set_entry() 928 ASSERT(i <= 2); in ept_get_entry() [all …]
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/xen/xen/arch/x86/hvm/svm/ |
A D | nestedsvm.c | 71 ASSERT(vvmcx_valid(v)); in nestedsvm_vmcb_map() 240 ASSERT(n1vmcb != NULL); in nsvm_vcpu_hostsave() 267 ASSERT(n1vmcb != NULL); in nsvm_vcpu_hostrestore() 268 ASSERT(n2vmcb != NULL); in nsvm_vcpu_hostrestore() 410 ASSERT(v != NULL); in nestedsvm_vmcb_set_nestedp2m() 411 ASSERT(vvmcb != NULL); in nestedsvm_vmcb_set_nestedp2m() 412 ASSERT(n2vmcb != NULL); in nestedsvm_vmcb_set_nestedp2m() 433 ASSERT(ns_vmcb != NULL); in nsvm_vmcb_prepare4vmrun() 434 ASSERT(n1vmcb != NULL); in nsvm_vmcb_prepare4vmrun() 435 ASSERT(n2vmcb != NULL); in nsvm_vmcb_prepare4vmrun() [all …]
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A D | intr.c | 53 ASSERT(!vmcb->event_inj.v); in svm_inject_nmi() 74 ASSERT(!vmcb->event_inj.v); in svm_inject_extint() 84 ASSERT(intack.source != hvm_intsrc_none); in svm_enable_intr_window() 94 ASSERT(gvmcb != NULL); in svm_enable_intr_window() 155 ASSERT(nestedhvm_enabled(v->domain)); in svm_intr_assist()
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/xen/xen/arch/x86/hvm/ |
A D | vpic.c | 52 ASSERT(vpic_is_locked(vpic)); in vpic_get_priority() 69 ASSERT(vpic_is_locked(vpic)); in vpic_get_highest_priority_irq() 99 ASSERT(vpic_is_locked(vpic)); in vpic_update_int_output() 142 ASSERT(vpic_is_locked(vpic)); in __vpic_intack() 454 ASSERT(has_vpic(d)); in vpic_irq_positive_edge() 455 ASSERT(irq <= 15); in vpic_irq_positive_edge() 456 ASSERT(vpic_is_locked(vpic)); in vpic_irq_positive_edge() 472 ASSERT(has_vpic(d)); in vpic_irq_negative_edge() 473 ASSERT(irq <= 15); in vpic_irq_negative_edge() 474 ASSERT(vpic_is_locked(vpic)); in vpic_irq_negative_edge() [all …]
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A D | vioapic.c | 148 ASSERT(vioapic); in vioapic_read() 179 ASSERT(is_hardware_domain(currd)); in vioapic_hwdom_map_gsi() 226 ASSERT(idx < vioapic->nr_pins); in vioapic_write_redirent() 342 ASSERT(vioapic); in vioapic_write() 388 ASSERT((delivery_mode == dest_Fixed) || in ioapic_inj_irq() 498 ASSERT(pin < vioapic->nr_pins); in vioapic_irq_positive_edge() 522 ASSERT(has_vioapic(d)); in vioapic_update_EOI() 633 ASSERT(!d->arch.hvm.nr_vioapics); in vioapic_reset() 649 ASSERT(!i && !base_gsi); in vioapic_reset() 679 ASSERT(!d->arch.hvm.nr_vioapics); in vioapic_init() [all …]
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/xen/xen/arch/x86/pv/ |
A D | traps.c | 51 ASSERT(vector == event->vector); /* Confirm no truncation. */ in pv_inject_event() 54 ASSERT(vector < 32); in pv_inject_event() 59 ASSERT(event->type == X86_EVENTTYPE_SW_INTERRUPT); in pv_inject_event() 63 ASSERT(error_code != X86_EVENT_NO_EC); in pv_inject_event() 65 ASSERT(error_code == X86_EVENT_NO_EC); in pv_inject_event()
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/xen/xen/arch/x86/mm/hap/ |
A D | nested_hap.c | 106 ASSERT(p2m); in nestedhap_fix_p2m() 107 ASSERT(p2m->set_entry); in nestedhap_fix_p2m() 108 ASSERT(p2m_locked_by_me(p2m)); in nestedhap_fix_p2m() 138 ASSERT(hvm_funcs.nhvm_hap_walk_L1_p2m); in nestedhap_walk_L1_p2m() 249 ASSERT(p2ma_10 <= p2m_access_n2rwx); in nestedhvm_hap_nested_page_fault()
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