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Searched refs:GICD_ICACTIVER (Results 1 – 6 of 6) sorted by relevance

/xen/xen/arch/arm/
A Dvgic-v2.c250 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in vgic_v2_distr_mmio_read()
496 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in vgic_v2_distr_mmio_write()
499 v, r, gicd_reg - GICD_ICACTIVER); in vgic_v2_distr_mmio_write()
A Dvgic-v3.c717 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in __vgic_v3_distr_common_mmio_read()
830 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in __vgic_v3_distr_common_mmio_write()
833 v, name, r, reg - GICD_ICACTIVER); in __vgic_v3_distr_common_mmio_write()
1197 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in vgic_v3_distr_mmio_read()
1384 case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): in vgic_v3_distr_mmio_write()
A Dgic-v2.c274 gicv2_poke_irq(irqd, GICD_ICACTIVER); in gicv2_set_active_state()
384 writel_gicd(~0x0, GICD_ICACTIVER + (i / 32) * 4); in gicv2_dist_init()
400 writel_gicd(0xffffffff, GICD_ICACTIVER); /* Diactivate PPIs and SGIs */ in gicv2_cpu_init()
A Dgic-v3.c510 gicv3_poke_irq(irqd, GICD_ICACTIVER, false); in gicv3_set_active_state()
633 writel_relaxed(0xffffffff, GICD + GICD_ICACTIVER + (i / 32) * 4); in gicv3_dist_init()
/xen/xen/include/asm-arm/
A Dgic.h39 #define GICD_ICACTIVER (0x380) macro
/xen/xen/arch/arm/vgic/
A Dvgic-mmio-v2.c283 REGISTER_DESC_WITH_BITS_PER_IRQ(GICD_ICACTIVER,

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