Searched refs:GICD_ICPENDR (Results 1 – 6 of 6) sorted by relevance
/xen/xen/arch/arm/ |
A D | vgic-v2.c | 245 case VRANGE32(GICD_ICPENDR, GICD_ICPENDRN): in vgic_v2_distr_mmio_read() 480 case VRANGE32(GICD_ICPENDR, GICD_ICPENDRN): in vgic_v2_distr_mmio_write() 484 v, r, gicd_reg - GICD_ICPENDR); in vgic_v2_distr_mmio_write()
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A D | vgic-v3.c | 712 case VRANGE32(GICD_ICPENDR, GICD_ICPENDR): in __vgic_v3_distr_common_mmio_read() 816 case VRANGE32(GICD_ICPENDR, GICD_ICPENDRN): in __vgic_v3_distr_common_mmio_write() 820 v, name, r, reg - GICD_ICPENDR); in __vgic_v3_distr_common_mmio_write() 1195 case VRANGE32(GICD_ICPENDR, GICD_ICPENDRN): in vgic_v3_distr_mmio_read() 1382 case VRANGE32(GICD_ICPENDR, GICD_ICPENDRN): in vgic_v3_distr_mmio_write()
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A D | gic-v2.c | 290 gicv2_poke_irq(irqd, GICD_ICPENDR); in gicv2_set_pending_state()
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A D | gic-v3.c | 523 gicv3_poke_irq(irqd, GICD_ICPENDR, false); in gicv3_set_pending_state()
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/xen/xen/include/asm-arm/ |
A D | gic.h | 35 #define GICD_ICPENDR (0x280) macro
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/xen/xen/arch/arm/vgic/ |
A D | vgic-mmio-v2.c | 277 REGISTER_DESC_WITH_BITS_PER_IRQ(GICD_ICPENDR,
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