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Searched refs:GICD_ISENABLER (Results 1 – 6 of 6) sorted by relevance

/xen/xen/arch/arm/
A Dvgic-v2.c225 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in vgic_v2_distr_mmio_read()
227 rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISENABLER, DABT_WORD); in vgic_v2_distr_mmio_read()
451 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in vgic_v2_distr_mmio_write()
453 rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISENABLER, DABT_WORD); in vgic_v2_distr_mmio_write()
A Dvgic-v3.c692 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in __vgic_v3_distr_common_mmio_read()
694 rank = vgic_rank_offset(v, 1, reg - GICD_ISENABLER, DABT_WORD); in __vgic_v3_distr_common_mmio_read()
787 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in __vgic_v3_distr_common_mmio_write()
789 rank = vgic_rank_offset(v, 1, reg - GICD_ISENABLER, DABT_WORD); in __vgic_v3_distr_common_mmio_write()
1192 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in vgic_v3_distr_mmio_read()
1379 case VRANGE32(GICD_ISENABLER, GICD_ISENABLERN): in vgic_v3_distr_mmio_write()
A Dgic-v2.c402 writel_gicd(0x0000ffff, GICD_ISENABLER); /* Enable all SGI */ in gicv2_cpu_init()
623 gicv2_poke_irq(desc, GICD_ISENABLER); in gicv2_irq_enable()
A Dgic-v3.c460 gicv3_poke_irq(irqd, GICD_ISENABLER, false); in gicv3_unmask_irq()
/xen/xen/include/asm-arm/
A Dgic.h29 #define GICD_ISENABLER (0x100) macro
/xen/xen/arch/arm/vgic/
A Dvgic-mmio-v2.c268 REGISTER_DESC_WITH_BITS_PER_IRQ(GICD_ISENABLER,

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