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Searched refs:GICD_ISPENDR (Results 1 – 6 of 6) sorted by relevance

/xen/xen/arch/arm/
A Dvgic-v2.c244 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in vgic_v2_distr_mmio_read()
473 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in vgic_v2_distr_mmio_write()
477 v, r, gicd_reg - GICD_ISPENDR); in vgic_v2_distr_mmio_write()
A Dvgic-v3.c711 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in __vgic_v3_distr_common_mmio_read()
809 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in __vgic_v3_distr_common_mmio_write()
813 v, name, r, reg - GICD_ISPENDR); in __vgic_v3_distr_common_mmio_write()
1194 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in vgic_v3_distr_mmio_read()
1381 case VRANGE32(GICD_ISPENDR, GICD_ISPENDRN): in vgic_v3_distr_mmio_write()
A Dgic-v2.c285 gicv2_poke_irq(irqd, GICD_ISPENDR); in gicv2_set_pending_state()
610 return gicv2_peek_irq(irqd, GICD_ISPENDR); in gicv2_read_pending_state()
A Dgic-v3.c520 gicv3_poke_irq(irqd, GICD_ISPENDR, false); in gicv3_set_pending_state()
1180 return gicv3_peek_irq(irqd, GICD_ISPENDR); in gicv3_read_pending_state()
/xen/xen/include/asm-arm/
A Dgic.h33 #define GICD_ISPENDR (0x200) macro
/xen/xen/arch/arm/vgic/
A Dvgic-mmio-v2.c274 REGISTER_DESC_WITH_BITS_PER_IRQ(GICD_ISPENDR,

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