/xen/xen/include/asm-x86/hvm/ |
A D | support.h | 44 #define HVM_DBG_LOG(level, _f, _a...) \ macro 52 #define HVM_DBG_LOG(level, _f, _a...) do {} while (0) macro
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/xen/xen/arch/x86/hvm/ |
A D | vlapic.c | 190 HVM_DBG_LOG(DBG_LEVEL_VLAPIC_INTERRUPT, in vlapic_get_ppr() 242 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "target %p, source %p, dest %#x, " in vlapic_match_dest() 576 HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER, in vlapic_get_tmcct() 594 HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER, in vlapic_set_tdcr() 647 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "offset %#x with length %#x, " in vlapic_mmio_read() 766 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, in vlapic_update_timer() 898 HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER, "timer divisor is %#x", in vlapic_reg_write() 915 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, in vlapic_mmio_write() 1170 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, in guest_wrmsr_apic_base() 1240 HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER, in vlapic_tdt_msr_set() [all …]
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A D | hypercall.c | 243 HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%lx, %lx, %lx, %lx, %lx, %lx)", in hvm_hypercall() 287 HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%x, %x, %x, %x, %x, %x)", eax, in hvm_hypercall() 327 HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu -> %lx", eax, regs->rax); in hvm_hypercall()
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A D | vioapic.c | 145 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "addr %lx", addr); in vioapic_read() 318 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "rte[%02x].%s = %08x", in vioapic_write_indirect() 385 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "irq %d trig %d deliv %d", in ioapic_inj_irq() 413 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, in vioapic_deliver() 438 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "null round robin: " in vioapic_deliver() 496 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "irq %x", irq); in vioapic_irq_positive_edge()
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A D | hvm.c | 2135 HVM_DBG_LOG(DBG_LEVEL_1, "CR%u, value = %lx", cr, val); in hvm_mov_to_cr() 2200 HVM_DBG_LOG(DBG_LEVEL_VMMU, "CR%u, value = %lx", cr, val); in hvm_mov_from_cr() 2257 HVM_DBG_LOG(DBG_LEVEL_VMMU, "Update CR0 value = %lx", value); in hvm_set_cr0() 2261 HVM_DBG_LOG(DBG_LEVEL_1, in hvm_set_cr0() 2301 HVM_DBG_LOG(DBG_LEVEL_1, "Enabling long mode"); in hvm_set_cr0() 2375 HVM_DBG_LOG(DBG_LEVEL_1, in hvm_set_cr3() 2402 HVM_DBG_LOG(DBG_LEVEL_VMMU, "CR3 value = %lx", value); in hvm_set_cr3() 2430 HVM_DBG_LOG(DBG_LEVEL_1, in hvm_set_cr4() 2440 HVM_DBG_LOG(DBG_LEVEL_1, "Guest cleared CR4.PAE while " in hvm_set_cr4() 4339 HVM_DBG_LOG(DBG_LEVEL_HCALL, "set param %u = %"PRIx64, in hvm_set_param() [all …]
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A D | mtrr.c | 404 HVM_DBG_LOG(DBG_LEVEL_MSR, "invalid MTRR def type:%x\n", def_type); in mtrr_def_type_msr_set() 410 HVM_DBG_LOG(DBG_LEVEL_MSR, "invalid msr content:%"PRIx64"\n", in mtrr_def_type_msr_set() 478 HVM_DBG_LOG(DBG_LEVEL_MSR, "invalid msr content:%"PRIx64"\n", in mtrr_var_range_msr_set()
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A D | vmsi.c | 53 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vmsi_inj_irq: vec %02x trig %d dm %d\n", in vmsi_inj_irq() 84 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "null MSI round robin: vector=%02x\n", in vmsi_deliver() 115 HVM_DBG_LOG(DBG_LEVEL_IOAPIC, in vmsi_deliver_pirq()
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/xen/tools/tests/vhpet/ |
A D | emul.h | 364 #define HVM_DBG_LOG(level, _f, _a...) \ macro
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/xen/xen/arch/x86/hvm/vmx/ |
A D | vmx.c | 2949 HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x", msr); in vmx_msr_read_intercept() 3042 HVM_DBG_LOG(DBG_LEVEL_MSR, "returns: ecx=%#x, msr_value=%#"PRIx64, in vmx_msr_read_intercept() 3173 HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); in vmx_msr_write_intercept() 3960 HVM_DBG_LOG(DBG_LEVEL_VMMU, in vmx_vmexit_handler()
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/xen/xen/arch/x86/hvm/svm/ |
A D | svm.c | 1947 HVM_DBG_LOG(DBG_LEVEL_MSR, "returns: ecx=%x, msr_value=%"PRIx64, in svm_msr_read_intercept() 2689 HVM_DBG_LOG(DBG_LEVEL_VMMU, in svm_vmexit_handler()
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