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Searched refs:MVFR0 (Results 1 – 2 of 2) sorted by relevance

/xen/xen/arch/arm/arm32/
A Dvfp.c29 if ( (READ_CP32(MVFR0) & MVFR0_A_SIMD_MASK) == 2 ) in vfp_save_state()
49 if ( (READ_CP32(MVFR0) & MVFR0_A_SIMD_MASK) == 2 ) /* 32 x 64 bits registers */ in vfp_restore_state()
/xen/xen/include/asm-arm/
A Dcpregs.h65 #define MVFR0 p10,7,c7,c0,0 /* Media and VFP Feature Register 0 */ macro

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