| /xen/xen/arch/arm/ |
| A D | cpufeature.c | 32 for ( i = 0; caps[i].matches; i++ ) in update_cpu_capabilities()
34 if ( !caps[i].matches(&caps[i]) ) in update_cpu_capabilities()
37 if ( !cpus_have_cap(caps[i].capability) && caps[i].desc ) in update_cpu_capabilities()
39 cpus_set_cap(caps[i].capability); in update_cpu_capabilities()
49 for ( ; caps->matches; caps++ ) in enable_cpu_capabilities()
51 if ( !cpus_have_cap(caps->capability) ) in enable_cpu_capabilities()
54 if ( caps->enable ) in enable_cpu_capabilities()
64 ret = stop_machine_run(caps->enable, (void *)caps, NR_CPUS); in enable_cpu_capabilities()
83 for ( ; caps->matches; caps++ ) in enable_nonboot_cpu_caps()
88 if ( caps->enable ) in enable_nonboot_cpu_caps()
[all …]
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| /xen/xen/arch/x86/ |
| A D | spec_ctrl.c | 203 caps = ARCH_CAPS_RDCL_NO; in xpti_init_default()
205 if ( caps & ARCH_CAPS_RDCL_NO ) in xpti_init_default()
722 if ( caps & ARCH_CAPS_RDCL_NO ) in l1tf_calculations()
789 if ( caps & ARCH_CAPS_MDS_NO ) in mds_calculations()
886 uint64_t caps = 0; in init_speculation_mitigations() local
889 rdmsrl(MSR_ARCH_CAPABILITIES, caps); in init_speculation_mitigations()
928 else if ( retpoline_safe(caps) ) in init_speculation_mitigations()
1035 xpti_init_default(caps); in init_speculation_mitigations()
1037 l1tf_calculations(caps); in init_speculation_mitigations()
1080 mds_calculations(caps); in init_speculation_mitigations()
[all …]
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| A D | tsx.c | 41 uint64_t caps = 0; in tsx_init() local
45 rdmsrl(MSR_ARCH_CAPABILITIES, caps); in tsx_init()
47 cpu_has_tsx_ctrl = !!(caps & ARCH_CAPS_TSX_CTRL); in tsx_init()
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| A D | sysctl.c | 353 sysctl->u.cpu_levelling_caps.caps = levelling_caps; in arch_do_sysctl()
354 if ( __copy_field_to_guest(u_sysctl, sysctl, u.cpu_levelling_caps.caps) ) in arch_do_sysctl()
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| A D | setup.c | 946 u16 caps = bootsym(boot_edid_caps); in __start_xen() local
948 (caps & 1) ? " V1" : "", in __start_xen()
949 (caps & 2) ? " V2" : "", in __start_xen()
950 !(caps & 3) ? " none" : ""); in __start_xen()
951 printk("EDID transfer time: %d seconds\n", caps >> 8); in __start_xen()
955 if ( !(caps & 3) ) in __start_xen()
957 else if ( (caps >> 8) > 5 ) in __start_xen()
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| A D | domctl.c | 292 VMCE_SIZE(caps), in vcpu_set_vmce()
302 offsetof(typeof(*evc), vmce.caps)); in vcpu_set_vmce()
303 BUILD_BUG_ON(sizeof(evc->mcg_cap) != sizeof(evc->vmce.caps)); in vcpu_set_vmce()
844 evc->vmce.caps = v->arch.vmce.mcg_cap; in arch_do_domctl()
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| /xen/xen/arch/x86/mm/hap/ |
| A D | nested_ept.c | 109 uint64_t caps = 0; in nept_get_ept_vpid_cap() local
112 caps |= NEPT_CAP_BITS; in nept_get_ept_vpid_cap()
114 caps &= ~VMX_EPT_EXEC_ONLY_SUPPORTED; in nept_get_ept_vpid_cap()
116 caps |= NVPID_CAP_BITS; in nept_get_ept_vpid_cap()
118 return caps; in nept_get_ept_vpid_cap()
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| /xen/xen/include/asm-arm/ |
| A D | cpufeature.h | 106 void update_cpu_capabilities(const struct arm_cpu_capabilities *caps,
109 void enable_cpu_capabilities(const struct arm_cpu_capabilities *caps);
110 int enable_nonboot_cpu_caps(const struct arm_cpu_capabilities *caps);
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| /xen/tools/libxc/ |
| A D | xc_resume.c | 30 xen_capabilities_info_t caps; in modify_returncode() local
59 if ( xc_version(xch, XENVER_capabilities, &caps) != 0 ) in modify_returncode()
64 dinfo->guest_width = strstr(caps, "x86_64") ? 8 : 4; in modify_returncode()
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| A D | xc_cpuid_x86.c | 42 int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps) in xc_get_cpu_levelling_caps() argument
51 *caps = sysctl.u.cpu_levelling_caps.caps; in xc_get_cpu_levelling_caps()
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| /xen/xen/arch/x86/cpu/mcheck/ |
| A D | vmce.c | 83 if ( ctxt->caps & ~guest_mcg_cap & ~MCG_CAP_COUNT & ~MCG_CTL_P ) in vmce_restore_vcpu()
87 is_hvm_vcpu(v) ? "HVM" : "PV", ctxt->caps, in vmce_restore_vcpu()
92 v->arch.vmce.mcg_cap = ctxt->caps; in vmce_restore_vcpu()
359 .caps = v->arch.vmce.mcg_cap, in vmce_save_vcpu_ctxt()
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| /xen/xen/arch/x86/cpu/ |
| A D | intel.c | 52 static uint64_t __init _probe_mask_msr(unsigned int *msr, uint64_t caps) in _probe_mask_msr() argument
56 expected_levelling_cap |= caps; in _probe_mask_msr()
61 levelling_caps |= caps; in _probe_mask_msr()
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| A D | amd.c | 144 static uint64_t __init _probe_mask_msr(unsigned int msr, uint64_t caps) in _probe_mask_msr() argument
148 expected_levelling_cap |= caps; in _probe_mask_msr()
152 levelling_caps |= caps; in _probe_mask_msr()
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| A D | vpmu_intel.c | 937 uint64_t caps; in core2_vpmu_init() local
939 rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps); in core2_vpmu_init()
940 full_width_write = (caps >> 13) & 1; in core2_vpmu_init()
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| /xen/xen/common/efi/ |
| A D | runtime.c | 368 EFI_TIME_CAPABILITIES caps; in efi_runtime_call() local
377 status = efi_rs->GetTime(cast_time(&op->u.get_time.time), &caps); in efi_runtime_call()
383 op->u.get_time.resolution = caps.Resolution; in efi_runtime_call()
384 op->u.get_time.accuracy = caps.Accuracy; in efi_runtime_call()
385 if ( caps.SetsToZero ) in efi_runtime_call()
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| /xen/xen/arch/arm/tee/ |
| A D | optee.c | 1624 uint32_t caps; in handle_exchange_capabilities() local
1627 caps = get_user_reg(regs, 1); in handle_exchange_capabilities()
1628 caps &= OPTEE_KNOWN_NSEC_CAPS; in handle_exchange_capabilities()
1630 arm_smccc_smc(OPTEE_SMC_EXCHANGE_CAPABILITIES, caps, 0, 0, 0, 0, 0, in handle_exchange_capabilities()
1637 caps = resp.a1; in handle_exchange_capabilities()
1640 caps &= OPTEE_KNOWN_SEC_CAPS; in handle_exchange_capabilities()
1643 caps &= ~OPTEE_SMC_SEC_CAP_HAVE_RESERVED_SHM; in handle_exchange_capabilities()
1646 if ( !(caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM) ) in handle_exchange_capabilities()
1653 set_user_reg(regs, 1, caps); in handle_exchange_capabilities()
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| /xen/docs/features/ |
| A D | sched_credit2.pandoc | 80 * vCPUs' reservations (similar to caps, but providing a vCPU with guarantees
106 2017-11-6 2 Xen 4.10 Soft-affinity and caps implemented
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| A D | sched_credit.pandoc | 56 complex (due to, e.g., the introduction of boosting, caps and vCPU
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| A D | feature-levelling.pandoc | 147 `XEN_SYSCTL_get_cpu_featureset`, and query for the levelling caps via
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| /xen/xen/arch/x86/efi/ |
| A D | efi-boot.h | 674 uint32_t *caps = boot_cpu_data.x86_capability; in efi_arch_cpu() local
678 caps[cpufeat_word(X86_FEATURE_HYPERVISOR)] = cpuid_ecx(1); in efi_arch_cpu()
682 caps[cpufeat_word(X86_FEATURE_SYSCALL)] = cpuid_edx(0x80000001); in efi_arch_cpu()
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| /xen/xen/include/public/arch-x86/hvm/ |
| A D | save.h | 618 uint64_t caps; member
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| /xen/xen/arch/x86/hvm/vmx/ |
| A D | vmx.c | 2391 uint64_t caps = 0; in has_if_pschange_mc() local
2401 rdmsrl(MSR_ARCH_CAPABILITIES, caps); in has_if_pschange_mc()
2403 if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) in has_if_pschange_mc()
2851 uint64_t caps; in lbr_tsx_fixup_check() local
2897 rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps); in lbr_tsx_fixup_check()
2898 lbr_format = caps & MSR_IA32_PERF_CAP_LBR_FORMAT; in lbr_tsx_fixup_check()
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| /xen/tools/pygrub/src/ |
| A D | pygrub | 673 caps = xc.xeninfo()['xen_caps'].split(" ")
674 for cap in caps:
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| /xen/tools/misc/ |
| A D | xen-hvmctx.c | 382 printf(" VMCE_VCPU: caps %" PRIx64 "\n", p.caps); in dump_vmce_vcpu()
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| /xen/xen/include/public/ |
| A D | sysctl.h | 788 uint32_t caps; member
|