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Searched refs:cpsr (Results 1 – 22 of 22) sorted by relevance

/xen/xen/include/asm-arm/
A Dregs.h21 return !!(regs->cpsr & PSR_MODE_BIT); in psr_mode_is_32bit()
25 #define usr_mode(r) psr_mode((r)->cpsr,PSR_MODE_USR)
26 #define fiq_mode(r) psr_mode((r)->cpsr,PSR_MODE_FIQ)
27 #define irq_mode(r) psr_mode((r)->cpsr,PSR_MODE_IRQ)
28 #define svc_mode(r) psr_mode((r)->cpsr,PSR_MODE_SVC)
29 #define mon_mode(r) psr_mode((r)->cpsr,PSR_MODE_MON)
30 #define abt_mode(r) psr_mode((r)->cpsr,PSR_MODE_ABT)
31 #define und_mode(r) psr_mode((r)->cpsr,PSR_MODE_UND)
32 #define sys_mode(r) psr_mode((r)->cpsr,PSR_MODE_SYS)
35 #define hyp_mode(r) psr_mode((r)->cpsr,PSR_MODE_HYP)
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A Devent.h14 return !(regs->cpsr & PSR_IRQ_MASK); in vcpu_event_delivery_is_enabled()
46 regs->cpsr &= ~PSR_IRQ_MASK; in local_event_delivery_enable()
/xen/xen/arch/arm/
A Dtraps.c389 regs->cpsr |= mode; in cpsr_switch_mode()
390 regs->cpsr |= PSR_IRQ_MASK; in cpsr_switch_mode()
416 uint32_t spsr = regs->cpsr; in inject_undef32_exception()
443 uint32_t spsr = regs->cpsr; in inject_abt32_exception()
1607 cpsr = regs->cpsr; in check_conditional_instr()
1616 it = ( (cpsr >> (10-2)) & 0xfc) | ((cpsr >> 25) & 0x3 ); in check_conditional_instr()
1626 cpsr_cond = cpsr >> 28; in check_conditional_instr()
1638 unsigned long itbits, cond, cpsr = regs->cpsr; in advance_pc() local
1662 cpsr &= ~PSR_IT_MASK; in advance_pc()
1663 cpsr |= cond << 13; in advance_pc()
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A Dvm_event.c28 req->data.regs.arm.cpsr = regs->cpsr; in vm_event_fill_regs()
A Dvpsci.c64 ctxt->user_regs.cpsr = PSR_GUEST32_INIT; in do_common_cpu_on()
68 ctxt->user_regs.cpsr |= PSR_THUMB; in do_common_cpu_on()
77 ctxt->user_regs.cpsr = PSR_GUEST64_INIT; in do_common_cpu_on()
A Ddecode.c154 if ( is_32bit_domain(current->domain) && regs->cpsr & PSR_THUMB ) in decode_instruction()
A Dio.c136 if ( check_workaround_766422() && (regs->cpsr & PSR_THUMB) && in try_handle_mmio()
A Ddomain.c875 if ( !is_guest_pv32_psr(regs->cpsr) ) in arch_set_info_guest()
892 if ( !is_guest_pv64_psr(regs->cpsr) ) in arch_set_info_guest()
A Ddomain_build.c2373 regs->cpsr = PSR_GUEST32_INIT; in construct_domain()
2392 regs->cpsr = PSR_GUEST64_INIT; in construct_domain()
/xen/xen/arch/arm/arm32/
A Ddomain.c25 C(cpsr,cpsr)
A Dasm-offsets.c28 OFFSET(UREGS_cpsr, struct cpu_user_regs, cpsr); in __dummy__()
60 OFFSET(UREGS_kernel_sizeof, struct cpu_user_regs, cpsr); in __dummy__()
A Dentry.S194 mrs r10, cpsr
A Dhead.S290 mrs r0, cpsr
/xen/xen/arch/arm/arm64/
A Ddomain.c19 C(cpsr, cpsr); C(spsr_el1, spsr_el1)
A Dasm-offsets.c31 OFFSET(UREGS_CPSR, struct cpu_user_regs, cpsr); in __dummy__()
/xen/tools/libxc/
A Dxc_dom_arm.c140 ctxt->user_regs.cpsr = PSR_GUEST32_INIT; in vcpu_arm32()
145 ctxt->user_regs.cpsr, ctxt->user_regs.pc32); in vcpu_arm32()
182 ctxt->user_regs.cpsr = PSR_GUEST64_INIT; in vcpu_arm64()
187 ctxt->user_regs.cpsr, ctxt->user_regs.pc64); in vcpu_arm64()
/xen/xen/include/asm-arm/arm32/
A Dprocessor.h39 uint32_t cpsr; /* Return mode */ member
/xen/xen/include/asm-arm/arm64/
A Dprocessor.h66 uint32_t cpsr; /* SPSR_EL2 */ member
/xen/xen/include/public/
A Dvm_event.h243 uint32_t cpsr; member
A Darch-arm.h270 uint32_t cpsr; /* SPSR_EL2 */ member
/xen/xen/arch/arm/arm32/lib/
A Dassembler.h145 mrs \oldcpsr, cpsr
/xen/tools/xentrace/
A Dxenctx.c559 printf("CPSR: %08"PRIx32"\n", regs->cpsr); in print_ctx_32()
617 printf("CPSR: %08"PRIx32"\n", regs->cpsr); in print_ctx_64()
673 if (ctx->user_regs.cpsr & PSR_MODE_BIT) in print_ctx()

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