Searched refs:dfn_x (Results 1 – 6 of 6) sorted by relevance
/xen/xen/drivers/passthrough/arm/ |
A D | iommu_helpers.c | 48 BUG_ON(mfn_x(mfn) != dfn_x(dfn)); in arm_iommu_map_page() 60 return guest_physmap_add_entry(d, _gfn(dfn_x(dfn)), _mfn(dfn_x(dfn)), 0, t); in arm_iommu_map_page() 74 return guest_physmap_remove_page(d, _gfn(dfn_x(dfn)), _mfn(dfn_x(dfn)), 0); in arm_iommu_unmap_page()
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/xen/xen/drivers/passthrough/amd/ |
A D | iommu_map.c | 306 dfn_x(dfn)); in amd_iommu_map_page() 311 if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn, true) || (pt_mfn[1] == 0) ) in amd_iommu_map_page() 315 dfn_x(dfn)); in amd_iommu_map_page() 321 *flush_flags |= set_iommu_pte_present(pt_mfn[1], dfn_x(dfn), mfn_x(mfn), in amd_iommu_map_page() 346 if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn, false) ) in amd_iommu_unmap_page() 350 dfn_x(dfn)); in amd_iommu_unmap_page() 358 *flush_flags |= clear_iommu_pte_present(pt_mfn[1], dfn_x(dfn)); in amd_iommu_unmap_page() 380 unsigned long dfn_l = dfn_x(dfn); in amd_iommu_flush_iotlb_pages()
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/xen/xen/include/xen/ |
A D | iommu.h | 39 #define dfn_x macro 42 #undef dfn_x 47 return _dfn(dfn_x(dfn) + i); in dfn_add() 52 return dfn_x(x) == dfn_x(y); in dfn_eq()
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/xen/xen/drivers/passthrough/ |
A D | iommu.c | 253 ASSERT(IS_ALIGNED(dfn_x(dfn), (1ul << page_order))); in iommu_map() 267 d->domain_id, dfn_x(dfn_add(dfn, i)), in iommu_map() 313 ASSERT(IS_ALIGNED(dfn_x(dfn), (1ul << page_order))); in iommu_unmap() 326 d->domain_id, dfn_x(dfn_add(dfn, i)), err); in iommu_unmap() 406 d->domain_id, rc, dfn_x(dfn), page_count, flush_flags); in iommu_iotlb_flush()
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/xen/xen/include/asm-x86/ |
A D | iommu.h | 43 #define dfn_to_daddr(dfn) __dfn_to_daddr(dfn_x(dfn))
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/xen/xen/drivers/passthrough/vtd/ |
A D | iommu.c | 608 dfn_eq(dfn, INVALID_DFN) || !IS_ALIGNED(dfn_x(dfn), page_count) ) in iommu_flush_iotlb() 1802 pte = &page[dfn_x(dfn) & LEVEL_MASK]; in intel_iommu_map_page() 1875 val = page[dfn_x(dfn) & LEVEL_MASK]; in intel_iommu_lookup_page()
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