Searched refs:l1d (Results 1 – 3 of 3) sorted by relevance
| /xen/xen/arch/x86/cpu/ |
| A D | intel_cacheinfo.c | 121 unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */ in init_intel_cacheinfo() local
210 l1d += cache_table[k].size; in init_intel_cacheinfo()
233 l1d = new_l1d; in init_intel_cacheinfo()
252 if (l1d) in init_intel_cacheinfo()
253 printk(", L1 D cache: %dK\n", l1d); in init_intel_cacheinfo()
264 c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d)); in init_intel_cacheinfo()
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| /xen/docs/misc/ |
| A D | hypfs-paths.pandoc | 105 l1d-flush "No" or "Yes"
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| A D | xen-command-line.pandoc | 512 `stibp`, `ibpb`, `l1d-flush` and `ssbd` are used by default if available and
2066 > l1d-flush,branch-harden,srb-lock}=<bool> ]`
2132 On hardware supporting L1D_FLUSH, the `l1d-flush=` option can be used to force
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