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Searched refs:lo (Results 1 – 25 of 45) sorted by relevance

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/xen/stubdom/
A Dnewlib-chk.patch66 fflush.lo fgetc.lo fgetpos.lo fgets.lo fileno.lo findfp.lo \
67 - fiprintf.lo flags.lo fopen.lo fprintf.lo fputc.lo fputs.lo \
68 - fread.lo freopen.lo fscanf.lo fiscanf.lo fseek.lo fsetpos.lo \
69 + fiprintf.lo flags.lo fopen.lo fprintf.lo fprintf_chk.lo fputc.lo \
70 + fputs.lo fread.lo freopen.lo fscanf.lo fiscanf.lo fseek.lo fsetpos.lo \
71 ftell.lo fvwrite.lo fwalk.lo fwrite.lo getc.lo getchar.lo \
72 getc_u.lo getchar_u.lo getdelim.lo getline.lo gets.lo \
73 iprintf.lo iscanf.lo makebuf.lo perror.lo printf.lo putc.lo \
74 putchar.lo putc_u.lo putchar_u.lo puts.lo refill.lo remove.lo \
75 rename.lo rewind.lo rget.lo scanf.lo sccl.lo setbuf.lo \
[all …]
/xen/xen/drivers/passthrough/vtd/
A Dqinval.c94 qinval_entry->q.cc_inv_dsc.lo.res_1 = 0; in queue_invalidate_context_sync()
95 qinval_entry->q.cc_inv_dsc.lo.did = did; in queue_invalidate_context_sync()
98 qinval_entry->q.cc_inv_dsc.lo.res_2 = 0; in queue_invalidate_context_sync()
128 qinval_entry->q.iotlb_inv_dsc.lo.dr = dr; in queue_invalidate_iotlb_sync()
129 qinval_entry->q.iotlb_inv_dsc.lo.dw = dw; in queue_invalidate_iotlb_sync()
167 qinval_entry->q.inv_wait_dsc.lo.sw = sw; in queue_invalidate_wait()
168 qinval_entry->q.inv_wait_dsc.lo.fn = fn; in queue_invalidate_wait()
169 qinval_entry->q.inv_wait_dsc.lo.res_1 = 0; in queue_invalidate_wait()
290 qinval_entry->q.iec_inv_dsc.lo.res_1 = 0; in queue_invalidate_iec_sync()
291 qinval_entry->q.iec_inv_dsc.lo.im = im; in queue_invalidate_iec_sync()
[all …]
A Diommu.h204 u64 lo; member
222 (c).lo |= (val & 3) << 2; \
229 do {(c).lo &= 0xfff; (c).lo |= (val) & PAGE_MASK_4K ;} while(0)
288 struct { u64 lo, hi; }; member
351 #define iremap_present(v) ((v).lo & 1)
375 u64 lo; member
387 }lo; member
401 }lo; member
417 }lo; member
432 }lo; member
[all …]
/xen/xen/include/asm-x86/x86_64/
A Dsystem.h20 struct { uint64_t lo, hi; }; in __cmpxchg16b() member
28 : "=d" (prev.hi), "=a" (prev.lo), in __cmpxchg16b()
30 : "c" (new.hi), "b" (new.lo), "d" (old.hi), "a" (old.lo) ); in __cmpxchg16b()
39 struct { uint64_t lo, hi; }; in cmpxchg16b_local_() member
47 : "=d" (prev.hi), "=a" (prev.lo), in cmpxchg16b_local_()
49 : "c" (new.hi), "b" (new.lo), "d" (old.hi), "a" (old.lo) ); in cmpxchg16b_local_()
/xen/xen/drivers/passthrough/amd/
A Diommu_guest.c33 #define reg_to_u64(reg) (((uint64_t)reg.hi << 32) | reg.lo )
37 (reg)->lo = (u32)(val); \
152 tail = iommu->ppr_log.reg_tail.lo; in guest_iommu_add_ppr_log()
153 head = iommu->ppr_log.reg_head.lo; in guest_iommu_add_ppr_log()
182 iommu->ppr_log.reg_tail.lo = tail; in guest_iommu_add_ppr_log()
202 tail = iommu->event_log.reg_tail.lo; in guest_iommu_add_event_log()
203 head = iommu->event_log.reg_head.lo; in guest_iommu_add_event_log()
231 iommu->event_log.reg_tail.lo = tail; in guest_iommu_add_event_log()
441 head = iommu->cmd_buffer.reg_head.lo; in guest_iommu_process_command()
442 tail = iommu->cmd_buffer.reg_tail.lo; in guest_iommu_process_command()
[all …]
A Diommu_map.c164 #define GCR3_MASK(hi, lo) (((1ul << ((hi) + 1)) - 1) & ~((1ul << (lo)) - 1)) in iommu_dte_set_guest_cr3() argument
165 #define GCR3_SHIFT(lo) ((lo) - PAGE_SHIFT) in iommu_dte_set_guest_cr3() argument
/xen/xen/include/asm-x86/
A Dmsr.h35 __u32 lo, hi; in wrmsrl() local
36 lo = (__u32)val; in wrmsrl()
38 wrmsr(msr, lo, hi); in wrmsrl()
61 uint32_t lo, hi; in wrmsr_safe() local
62 lo = (uint32_t)val; in wrmsr_safe()
72 : "c" (msr), "a" (lo), "d" (hi), "0" (0), "i" (-EFAULT)); in wrmsr_safe()
A Dxstate.h114 uint32_t lo, hi; in xgetbv() local
118 : "=a" (lo), "=d" (hi) : "c" (index) ); in xgetbv()
120 return lo | ((uint64_t)hi << 32); in xgetbv()
A Dapic.h117 u32 lo, hi; in apic_icr_read() local
123 lo = apic_mem_read(APIC_ICR); in apic_icr_read()
127 return ((u64)lo) | (((u64)hi) << 32); in apic_icr_read()
A Dhypercall.h165 unsigned int va, u32 lo, u32 hi, unsigned int flags);
168 unsigned int va, u32 lo, u32 hi, unsigned int flags, domid_t domid);
A Dmtrr.h75 extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
/xen/xen/arch/x86/cpu/
A Damd.c63 : "=a" (*lo), "=d" (*hi), "=r" (err) in rdmsr_amd_safe()
81 : "c" (msr), "a" (lo), "d" (hi), "D" (0x9c5a203a), in wrmsr_amd_safe()
146 unsigned int hi, lo; in _probe_mask_msr() local
150 if ((rdmsr_amd_safe(msr, &lo, &hi) == 0) && in _probe_mask_msr()
151 (wrmsr_amd_safe(msr, lo, hi) == 0)) in _probe_mask_msr()
154 return ((uint64_t)hi << 32) | lo; in _probe_mask_msr()
539 uint64_t hi, lo, val; in amd_log_freq() local
617 if (!rdmsr_safe(0xC0010064 + h, lo) && (lo >> 63)) in amd_log_freq()
619 if (!(lo >> 63)) in amd_log_freq()
631 smp_processor_id(), FREQ(lo), FREQ(hi)); in amd_log_freq()
[all …]
A Dintel.c343 unsigned long lo, hi; in Intel_errata_workarounds() local
346 rdmsr (MSR_IA32_MISC_ENABLE, lo, hi); in Intel_errata_workarounds()
347 if ((lo & (1<<9)) == 0) { in Intel_errata_workarounds()
350 lo |= (1<<9); /* Disable hw prefetching */ in Intel_errata_workarounds()
351 wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); in Intel_errata_workarounds()
/xen/xen/arch/x86/boot/
A Dcmdline.c189 size_t lc, lo; in find_opt() local
191 lo = strlen(opt); in find_opt()
205 if ( !strncmp(cmdline, opt, arg ? lo : max(lc, lo)) ) in find_opt()
206 return cmdline + lo; in find_opt()
/xen/xen/common/sched/
A Dcompat.c42 int compat_set_timer_op(u32 lo, s32 hi) in compat_set_timer_op() argument
44 return do_set_timer_op(((s64)hi << 32) | lo); in compat_set_timer_op()
/xen/tools/tests/x86_emulator/
A Dx86-emulate.c200 uint32_t lo, hi; in emul_test_read_xcr() local
218 asm ( "xgetbv" : "=a" (lo), "=d" (hi) : "c" (reg) ); in emul_test_read_xcr()
219 *val = lo | ((uint64_t)hi << 32); in emul_test_read_xcr()
A Dsimd-clmul.c79 vec_t x = {}, y, z, lo, hi; in clmul_test() local
118 y = lo = clmul_ll(x, src); in clmul_test()
125 vec_t l = lane_shr_v(lo, 2 * j); in clmul_test()
A Dx86-emulate.h116 uint32_t lo, hi; in xgetbv() local
118 asm ( ".byte 0x0f, 0x01, 0xd0" : "=a" (lo), "=d" (hi) : "c" (xcr) ); in xgetbv()
120 return ((uint64_t)hi << 32) | lo; in xgetbv()
/xen/xen/arch/x86/cpu/mtrr/
A Dgeneric.c360 uint32_t lo, hi, base_lo, base_hi, mask_lo, mask_hi; in set_mtrr_var_ranges() local
365 lo = (uint32_t)msr_content; in set_mtrr_var_ranges()
370 lo &= 0xfffff0ffUL; in set_mtrr_var_ranges()
375 if ((base_lo != lo) || (base_hi != hi)) { in set_mtrr_var_ranges()
381 lo = (uint32_t)msr_content; in set_mtrr_var_ranges()
386 lo &= 0xfffff800UL; in set_mtrr_var_ranges()
391 if ((mask_lo != lo) || (mask_hi != hi)) { in set_mtrr_var_ranges()
/xen/xen/arch/x86/genapic/
A Dx2apic.c271 u32 lo, hi; in check_x2apic_preenabled() local
277 rdmsr(MSR_APIC_BASE, lo, hi); in check_x2apic_preenabled()
278 if ( lo & APIC_BASE_EXTD ) in check_x2apic_preenabled()
/xen/xen/arch/x86/acpi/cpufreq/
A Dpowernow.c147 u32 hi, lo, fid, did; in amd_fixup_frequency() local
154 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); in amd_fixup_frequency()
162 fid = lo & 0x3f; in amd_fixup_frequency()
163 did = (lo >> 6) & 7; in amd_fixup_frequency()
/xen/xen/arch/arm/arm64/
A Dcache.S51 b.lo 1b
/xen/xen/arch/arm/arm64/lib/
A Dmemmove.S61 b.lo memcpy
69 b.lo .Ltail15 /*probably non-alignment accesses.*/
/xen/tools/misc/
A Dxen-hvmctx.c80 uint64_t lo; member
86 uint64_t lo; member
121 i, r->mm[i].hi, r->mm[i].lo, in dump_fpu()
126 i, r->xmm[i].hi, r->xmm[i].lo); in dump_fpu()
/xen/xen/include/acpi/
A Dactypes.h288 u32 lo; member
298 u32 lo; member

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