Searched refs:mcr (Results 1 – 6 of 6) sorted by relevance
/xen/xen/arch/arm/arm32/ |
A D | head.S | 253 mcr CP32(r0, TLBIALLH) /* Flush hypervisor TLB */ 254 mcr CP32(r0, ICIALLU) /* Flush I-cache */ 255 mcr CP32(r0, BPIALL) /* Flush branch predictor */ 343 mcr CP32(r0, HMAIR0) 344 mcr CP32(r1, HMAIR1) 353 mcr CP32(r0, HTCR) 356 mcr CP32(r0, HSCTLR) 539 mcr CP32(r0, TLBIALLH) /* Flush hypervisor TLBs */ 605 mcr CP32(r0, TLBIALLH) 680 mcr CP32(r0, ICIALLU) /* Flush I-cache */ [all …]
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A D | proc-v7.S | 30 mcr CP32(r0, ACTLR)
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A D | entry.S | 46 mcr p15, 4, r1, c12, c0, 0 267 mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */ 287 mcr p15, 0, r0, c7, c5, 6 /* BPIALL */
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/xen/xen/drivers/char/ |
A D | omap-uart.c | 137 u32 lcr, efr, mcr; in fifo_setup() local 157 mcr = omap_read(uart, UART_MCR); in fifo_setup() 158 omap_write(uart, UART_MCR, mcr|UART_MCR_TCRTLR); in fifo_setup() 185 omap_write(uart, UART_MCR, mcr); in fifo_setup()
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/xen/xen/arch/arm/arm32/lib/ |
A D | assembler.h | 205 mcr p15, 0, r0, c7, c5, 4 221 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
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/xen/xen/include/asm-x86/ |
A D | mtrr.h | 75 extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
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