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Searched refs:mpos (Results 1 – 3 of 3) sorted by relevance

/xen/xen/arch/x86/
A Dmsi.c342 mask_bits = pci_conf_read32(pdev->sbdf, entry->msi.mpos); in msi_set_mask_bit()
345 pci_conf_write32(pdev->sbdf, entry->msi.mpos, mask_bits); in msi_set_mask_bit()
411 return (pci_conf_read32(entry->dev->sbdf, entry->msi.mpos) >> in msi_get_mask_bit()
613 unsigned int i, mpos; in msi_capability_init() local
636 mpos = msi_mask_bits_reg(pos, is_64bit_address(control)); in msi_capability_init()
647 entry[i].msi.mpos = mpos; in msi_capability_init()
658 maskbits = pci_conf_read32(dev->sbdf, mpos); in msi_capability_init()
660 pci_conf_write32(dev->sbdf, mpos, maskbits); in msi_capability_init()
1281 if ( reg < pos || reg >= entry->msi.mpos + 8 ) in pci_msi_conf_write_intercept()
1286 if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 ) in pci_msi_conf_write_intercept()
/xen/xen/include/asm-x86/
A Dmsi.h118 unsigned int mpos;/* location of mask register */ member
/xen/xen/drivers/passthrough/amd/
A Diommu_init.c787 iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos, in set_iommu_interrupt_handler()

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