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Searched refs:msrs (Results 1 – 25 of 28) sorted by relevance

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/xen/xen/arch/x86/oprofile/
A Dop_model_athlon.c36 #define CTR_READ(msr_content,msrs,c) do {rdmsrl(msrs->counters[(c)].addr, (msr_content));} while (0) argument
37 #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1);} while (0) argument
40 #define CTRL_READ(msr_content,msrs,c) do {rdmsrl(msrs->controls[(c)].addr, (msr_content));} while (… argument
41 #define CTRL_WRITE(msr_content,msrs,c) do {wrmsrl(msrs->controls[(c)].addr, (msr_content));} while … argument
206 CTRL_READ(msr_content, msrs, i); in athlon_setup_ctrs()
208 CTRL_WRITE(msr_content, msrs, i); in athlon_setup_ctrs()
213 CTR_WRITE(1, msrs, i); in athlon_setup_ctrs()
223 CTRL_READ(msr_content, msrs, i); in athlon_setup_ctrs()
337 CTR_READ(msr_content, msrs, i); in athlon_check_ctrs()
396 CTRL_READ(msr_content, msrs, i); in athlon_start()
[all …]
A Dop_model_ppro.c51 #define CTRL_READ(msr_content,msrs,c) do {rdmsrl((msrs->controls[(c)].addr), (msr_content));} while… argument
52 #define CTRL_WRITE(msr_content,msrs,c) do {wrmsrl((msrs->controls[(c)].addr), (msr_content));} whil… argument
101 CTRL_READ(msr_content, msrs, i); in ppro_setup_ctrs()
103 CTRL_WRITE(msr_content, msrs, i); in ppro_setup_ctrs()
117 CTRL_READ(msr_content, msrs, i); in ppro_setup_ctrs()
124 CTRL_WRITE(msr_content, msrs, i); in ppro_setup_ctrs()
180 CTRL_READ(msr_content, msrs, i); in ppro_start()
182 CTRL_WRITE(msr_content, msrs, i); in ppro_start()
201 CTRL_READ(msr_content, msrs, i); in ppro_stop()
203 CTRL_WRITE(msr_content, msrs, i); in ppro_stop()
[all …]
A Dnmi_int.c105 struct op_msr *counters = msrs->counters; in nmi_cpu_save_registers()
106 struct op_msr *controls = msrs->controls; in nmi_cpu_save_registers()
122 struct op_msrs * msrs = &cpu_msrs[cpu]; in nmi_save_registers() local
123 model->fill_in_addresses(msrs); in nmi_save_registers()
124 nmi_cpu_save_registers(msrs); in nmi_save_registers()
170 struct op_msrs * msrs = &cpu_msrs[cpu]; in nmi_cpu_setup() local
171 model->setup_ctrs(msrs); in nmi_cpu_setup()
236 struct op_msrs * msrs = &cpu_msrs[cpu]; in nmi_cpu_shutdown() local
237 nmi_restore_registers(msrs); in nmi_cpu_shutdown()
255 model->start(msrs); in nmi_cpu_start()
[all …]
A Dop_x86_model.h32 void (*fill_in_addresses)(struct op_msrs * const msrs);
33 void (*setup_ctrs)(struct op_msrs const * const msrs);
35 struct op_msrs const * const msrs,
37 void (*start)(struct op_msrs const * const msrs);
38 void (*stop)(struct op_msrs const * const msrs);
A Dop_model_p4.c403 msrs->counters[i].addr = in p4_fill_in_addresses()
412 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
418 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
426 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
431 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
437 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
442 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
447 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
454 msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; in p4_fill_in_addresses()
455 msrs->controls[i++].addr = MSR_P4_CRU_ESCR4; in p4_fill_in_addresses()
[all …]
/xen/xen/arch/x86/
A Dmsr.c158 if ( !msrs ) in init_vcpu_msr_policy()
161 v->arch.msrs = msrs; in init_vcpu_msr_policy()
172 const struct vcpu_msrs *msrs = v->arch.msrs; in guest_rdmsr() local
240 *val = msrs->spec_ctrl.raw; in guest_rdmsr()
293 *val = msrs->xss.raw; in guest_rdmsr()
312 *val = msrs->tsc_aux; in guest_rdmsr()
330 *val = msrs->dr_mask[ in guest_rdmsr()
362 struct vcpu_msrs *msrs = v->arch.msrs; in guest_wrmsr() local
531 msrs->xss.raw = val; in guest_wrmsr()
552 msrs->tsc_aux = val; in guest_wrmsr()
[all …]
A Ddomain.c408 v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ in arch_vcpu_create()
425 xfree(v->arch.msrs); in arch_vcpu_create()
426 v->arch.msrs = NULL; in arch_vcpu_create()
438 xfree(v->arch.msrs); in arch_vcpu_destroy()
439 v->arch.msrs = NULL; in arch_vcpu_destroy()
1569 wrmsr_tsc_aux(v->arch.msrs->tsc_aux); in paravirt_ctxt_switch_to()
1729 set_msr_xss(n->arch.msrs->xss.raw); in __context_switch()
A Dtraps.c2158 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, curr->arch.msrs->dr_mask[0]); in activate_debugregs()
2159 wrmsrl(MSR_AMD64_DR1_ADDRESS_MASK, curr->arch.msrs->dr_mask[1]); in activate_debugregs()
2160 wrmsrl(MSR_AMD64_DR2_ADDRESS_MASK, curr->arch.msrs->dr_mask[2]); in activate_debugregs()
2161 wrmsrl(MSR_AMD64_DR3_ADDRESS_MASK, curr->arch.msrs->dr_mask[3]); in activate_debugregs()
A Ddomctl.c1248 if ( guest_handle_is_null(vmsrs->msrs) ) in arch_do_domctl()
1286 if ( copy_to_guest_offset(vmsrs->msrs, i, &msr, 1) ) in arch_do_domctl()
1310 if ( copy_from_guest_offset(&msr, vmsrs->msrs, i, 1) ) in arch_do_domctl()
/xen/xen/lib/x86/
A Dmsr.c10 msr_entry_buffer_t msrs, in copy_msr_to_buffer() argument
18 if ( copy_to_buffer_offset(msrs, *curr_entry, &ent, 1) ) in copy_msr_to_buffer()
27 msr_entry_buffer_t msrs, uint32_t *nr_entries_p) in x86_msr_copy_to_buffer() argument
37 idx, val, msrs, &curr_entry, nr_entries)) ) \ in x86_msr_copy_to_buffer()
52 const msr_entry_buffer_t msrs, uint32_t nr_entries, in x86_msr_copy_from_buffer() argument
77 if ( copy_from_buffer_offset(&data, msrs, i, 1) ) in x86_msr_copy_from_buffer()
/xen/tools/libxc/
A Dxc_sr_common_x86.c49 struct xc_sr_record msrs = { .type = REC_TYPE_X86_MSR_POLICY, }; in write_x86_cpu_policy_records() local
60 msrs.data = malloc(nr_msrs * sizeof(xen_msr_entry_t)); in write_x86_cpu_policy_records()
61 if ( !cpuid.data || !msrs.data ) in write_x86_cpu_policy_records()
69 &nr_msrs, msrs.data) ) in write_x86_cpu_policy_records()
84 msrs.length = nr_msrs * sizeof(xen_msr_entry_t); in write_x86_cpu_policy_records()
85 if ( msrs.length ) in write_x86_cpu_policy_records()
86 rc = write_record(ctx, &msrs); in write_x86_cpu_policy_records()
90 free(msrs.data); in write_x86_cpu_policy_records()
A Dxc_cpuid_x86.c139 DECLARE_HYPERCALL_BOUNCE(msrs, in xc_get_system_cpu_policy()
140 *nr_msrs * sizeof(*msrs), in xc_get_system_cpu_policy()
145 xc_hypercall_bounce_pre(xch, msrs) ) in xc_get_system_cpu_policy()
158 xc_hypercall_bounce_post(xch, msrs); in xc_get_system_cpu_policy()
177 DECLARE_HYPERCALL_BOUNCE(msrs, in xc_get_domain_cpu_policy()
183 xc_hypercall_bounce_pre(xch, msrs) ) in xc_get_domain_cpu_policy()
196 xc_hypercall_bounce_post(xch, msrs); in xc_get_domain_cpu_policy()
217 DECLARE_HYPERCALL_BOUNCE(msrs, in xc_set_domain_cpu_policy()
218 nr_msrs * sizeof(*msrs), in xc_set_domain_cpu_policy()
232 if ( xc_hypercall_bounce_pre(xch, msrs) ) in xc_set_domain_cpu_policy()
[all …]
A Dxc_sr_save_x86_pv.c722 set_xen_guest_handle(domctl.u.vcpu_msrs.msrs, buffer); in write_one_vcpu_msrs()
A Dxc_sr_restore_x86_pv.c457 set_xen_guest_handle(domctl.u.vcpu_msrs.msrs, buffer); in process_vcpu_msrs()
/xen/tools/misc/
A Dxen-cpuid.c328 xen_msr_entry_t *msrs, uint32_t nr_msrs) in print_policy() argument
351 msrs[l].idx, msrs[l].val); in print_policy()
457 xen_msr_entry_t *msrs; in main() local
474 msrs = calloc(max_msrs, sizeof(xen_msr_entry_t)); in main()
475 if ( !msrs ) in main()
485 &nr_msrs, msrs) ) in main()
490 print_policy(name, leaves, nr_leaves, msrs, nr_msrs); in main()
501 &nr_msrs, msrs) ) in main()
514 msrs, nr_msrs); in main()
519 free(msrs); in main()
/xen/tools/fuzz/cpu-policy/
A Dafl-policy-fuzzer.c83 xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * in check_msr() local
88 if ( !msrs ) in check_msr()
91 rc = x86_msr_copy_to_buffer(mp, msrs, &nr); in check_msr()
95 rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); in check_msr()
99 free(msrs); in check_msr()
/xen/xen/arch/x86/pv/
A Demul-inv-op.c31 const struct vcpu_msrs *msrs = current->arch.msrs; in emulate_forced_invalid_op() local
55 if ( msrs->misc_features_enables.cpuid_faulting && in emulate_forced_invalid_op()
/xen/xen/include/xen/lib/x86/
A Dmsr.h71 msr_entry_buffer_t msrs, uint32_t *nr_entries);
91 const msr_entry_buffer_t msrs, uint32_t nr_entries,
/xen/tools/tests/cpu-policy/
A Dtest-cpu-policy.c251 xen_msr_entry_t *msrs = malloc(nr * sizeof(*msrs)); in test_msr_serialise_success() local
254 if ( !msrs ) in test_msr_serialise_success()
257 rc = x86_msr_copy_to_buffer(&t->p, msrs, &nr); in test_msr_serialise_success()
274 free(msrs); in test_msr_serialise_success()
/xen/xen/arch/x86/hvm/svm/
A Dsvm.c195 rdmsrl(MSR_AMD64_DR0_ADDRESS_MASK, v->arch.msrs->dr_mask[0]); in svm_save_dr()
196 rdmsrl(MSR_AMD64_DR1_ADDRESS_MASK, v->arch.msrs->dr_mask[1]); in svm_save_dr()
197 rdmsrl(MSR_AMD64_DR2_ADDRESS_MASK, v->arch.msrs->dr_mask[2]); in svm_save_dr()
198 rdmsrl(MSR_AMD64_DR3_ADDRESS_MASK, v->arch.msrs->dr_mask[3]); in svm_save_dr()
226 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, v->arch.msrs->dr_mask[0]); in __restore_debug_registers()
227 wrmsrl(MSR_AMD64_DR1_ADDRESS_MASK, v->arch.msrs->dr_mask[1]); in __restore_debug_registers()
228 wrmsrl(MSR_AMD64_DR2_ADDRESS_MASK, v->arch.msrs->dr_mask[2]); in __restore_debug_registers()
229 wrmsrl(MSR_AMD64_DR3_ADDRESS_MASK, v->arch.msrs->dr_mask[3]); in __restore_debug_registers()
987 wrmsr_tsc_aux(v->arch.msrs->tsc_aux); in svm_ctxt_switch_to()
2180 regs->rcx = curr->arch.msrs->tsc_aux; in svm_vmexit_do_rdtsc()
/xen/xen/arch/x86/x86_64/
A Dasm-offsets.c74 OFFSET(VCPU_arch_msrs, struct vcpu, arch.msrs); in __dummy__()
/xen/xen/include/asm-x86/
A Ddomain.h642 struct vcpu_msrs *msrs; member
/xen/tools/libxc/include/
A Dxenctrl.h2530 uint32_t *nr_msrs, xen_msr_entry_t *msrs);
2533 uint32_t *nr_msrs, xen_msr_entry_t *msrs);
2536 uint32_t nr_msrs, xen_msr_entry_t *msrs,
/xen/xen/include/public/
A Ddomctl.h963 XEN_GUEST_HANDLE_64(xen_domctl_vcpu_msr_t) msrs; /* IN/OUT */
/xen/xen/arch/x86/cpu/
A Dcommon.c199 next->arch.msrs-> in ctxt_switch_levelling()

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