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Searched refs:rt (Results 1 – 17 of 17) sorted by relevance

/xen/xen/drivers/passthrough/amd/
A Diommu_detect.c137 int rt = 0; in amd_iommu_detect_one_acpi() local
174 rt = get_iommu_capabilities(iommu->seg, bus, dev, func, in amd_iommu_detect_one_acpi()
176 if ( rt ) in amd_iommu_detect_one_acpi()
179 rt = get_iommu_msi_capabilities(iommu->seg, bus, dev, func, iommu); in amd_iommu_detect_one_acpi()
180 if ( rt ) in amd_iommu_detect_one_acpi()
183 rt = pci_ro_device(iommu->seg, bus, PCI_DEVFN(dev, func)); in amd_iommu_detect_one_acpi()
184 if ( rt ) in amd_iommu_detect_one_acpi()
187 iommu->seg, bus, dev, func, rt); in amd_iommu_detect_one_acpi()
190 rt = 0; in amd_iommu_detect_one_acpi()
193 if ( rt ) in amd_iommu_detect_one_acpi()
[all …]
A Diommu_map.c431 int rt = 0; in amd_iommu_reserve_domain_unity_map() local
442 rt = amd_iommu_map_page(domain, _dfn(frame), _mfn(frame), flags, in amd_iommu_reserve_domain_unity_map()
444 if ( rt != 0 ) in amd_iommu_reserve_domain_unity_map()
454 return rt; in amd_iommu_reserve_domain_unity_map()
/xen/xen/arch/arm/arm32/
A Ddebug-scif.inc45 * rt: register which contains the character to transmit
47 .macro early_uart_transmit rb rt
48 strb \rt, [\rb, #TX_FIFO_REG] /* Write data register */
49 ldrh \rt, [\rb, #STATUS_REG] /* Read status register */
50 and \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE)) /* Clear TEND and TDFE bits */
51 strh \rt, [\rb, #STATUS_REG] /* Write status register */
A Ddebug-8250.inc34 * rt: register which contains the character to transmit
36 .macro early_uart_transmit rb rt
37 str \rt, [\rb, #UART_THR] /* Write Transmit buffer */
A Ddebug-exynos4210.inc36 * rt: register which contains the character to transmit
38 .macro early_uart_transmit rb rt
39 str \rt, [\rb, #UTXH] /* -> UTXH (Data Register) */
A Ddebug-pl011.inc53 * rt: register which contains the character to transmit
55 .macro early_uart_transmit rb, rt
56 str \rt, [\rb, #DR] /* -> UARTDR (Data Register) */
/xen/xen/arch/arm/
A Ddecode.c39 uint16_t rt; in decode_thumb2() local
44 rt = (hw2 >> 12) & 0xf; in decode_thumb2()
62 if ( rt == 15 ) in decode_thumb2()
70 update_dabt(dabt, rt, (hw1 >> 5) & 3, sign); in decode_thumb2()
/xen/xen/xsm/flask/ss/
A Dpolicydb.c656 struct range_trans *rt, *lrt = NULL; in policydb_destroy() local
702 for ( rt = p->range_tr; rt; rt = rt -> next ) in policydb_destroy()
710 lrt = rt; in policydb_destroy()
1746 struct range_trans *rt, *lrt; in policydb_read() local
2173 rt = xzalloc(struct range_trans); in policydb_read()
2174 if ( !rt ) in policydb_read()
2180 lrt->next = rt; in policydb_read()
2182 p->range_tr = rt; in policydb_read()
2186 rt->source_type = le32_to_cpu(buf[0]); in policydb_read()
2187 rt->target_type = le32_to_cpu(buf[1]); in policydb_read()
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/xen/docs/features/
A Dsched_rtds.pandoc34 xl cpupool-create name=\"pool-rt\" sched=\"rtds\" cpus=[4,5,6,8]
38 * `xl sched-rtds -d vm-rt -v all`
39 * `xl sched-rtds -d vm-rt -v all -p 10000 -b 2500`
43 * `xl sched-rtds -d vm-rt -v 0 -p 20000 -b 10000 -e 1 -v 1 -p 45000 -b 12000 -e 0`
/xen/xen/common/sched/
A DMakefile5 obj-$(CONFIG_SCHED_RTDS) += rt.o
/xen/stubdom/vtpmmgr/
A Dtpm.h121 TPM_RESOURCE_TYPE rt //in
A Dtpm.c591 TPM_RESOURCE_TYPE rt) { in TPM_FlushSpecific() argument
598 PACK_IN(TPM_RESOURCE_TYPE, rt); in TPM_FlushSpecific()
/xen/xen/arch/x86/hvm/viridian/
A Dtime.c26 const struct viridian_page *rt = &vd->reference_tsc; in update_reference_tsc() local
27 HV_REFERENCE_TSC_PAGE *p = rt->ptr; in update_reference_tsc()
/xen/tools/python/scripts/
A Dconvert-legacy-stream107 def write_record(rt, *argl): argument
111 record = pack(libxc.RH_FORMAT, rt, length) + alldata
/xen/xen/include/asm-x86/
A Dp2m.h536 p2m_type_t *rt, p2m_access_t *ra, mfn_t *rmfn, struct domain *ld, in get_two_gfns() argument
/xen/
A DMAINTAINERS440 F: xen/common/sched/rt.c
/xen/docs/man/
A Dxl.1.pod.in1176 This rt scheduler applies Preemptive Global Earliest Deadline First

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