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Searched refs:vectors (Results 1 – 10 of 10) sorted by relevance

/xen/xen/drivers/vpci/
A Dmsi.c31 MASK_INSR(fls(msi->vectors) - 1, PCI_MSI_FLAGS_QSIZE) | in control_read()
41 unsigned int vectors = min_t(uint8_t, in control_write() local
52 (vectors == msi->vectors || !msi->enabled) ) in control_write()
54 msi->vectors = vectors; in control_write()
71 if ( vpci_msi_arch_enable(msi, pdev, vectors) ) in control_write()
77 msi->vectors = vectors; in control_write()
175 for ( i = ffs(dmask) - 1; dmask && i < msi->vectors; in mask_write()
221 pdev->vpci->msi->vectors = 1; in init_msi()
300 pdev->msi_maxvec, msi->vectors); in vpci_dump_msi()
/xen/tools/flask/policy/policy/
A Daccess_vectors1 # Locally defined access vectors
3 # Define access vectors for the security classes defined in security_classes.
4 # Access vectors defined in this file should not be used by the hypervisor.
A Dsecurity_classes7 # Access vectors for these classes must be defined in the access_vectors file.
/xen/xen/arch/arm/arm64/
A Dbpi.S28 .macro vectors target macro
57 vectors hyp_traps_vector
/xen/xen/arch/x86/hvm/
A Dvmsi.c678 uint64_t address, unsigned int vectors, in vpci_msi_update() argument
685 for ( i = 0; i < vectors; i++ ) in vpci_msi_update()
688 uint8_t vector_mask = 0xff >> (8 - fls(vectors) + 1); in vpci_msi_update()
720 rc = vpci_msi_update(pdev, msi->data, msi->address, msi->vectors, in vpci_msi_arch_update()
747 unsigned vectors = table_base ? 1 : nr; in vpci_msi_enable() local
764 rc = vpci_msi_update(pdev, data, address, vectors, pirq, mask); in vpci_msi_enable()
779 unsigned int vectors) in vpci_msi_arch_enable() argument
784 rc = vpci_msi_enable(pdev, msi->data, msi->address, vectors, 0, msi->mask); in vpci_msi_arch_enable()
822 vpci_msi_disable(pdev, msi->arch.pirq, msi->vectors); in vpci_msi_arch_disable()
/xen/xen/include/xen/
A Dvpci.h103 uint8_t vectors : 6; member
161 unsigned int vectors);
/xen/docs/designs/
A Dqemu-deprivilege.md12 vectors which they close); others are "just in case" (that is, there
13 are no known attack vectors, but we perform the restrictions to reduce
14 the possibility of unknown attack vectors).
/xen/docs/misc/
A Dvtd-pi.txt17 per vector, for up to 256 vectors).
118 for the virtual-vectors and contains the attributes of the notification event
225 _special_ way compared to normal vectors, please refer to 29.6 in Intel SDM
/xen/xen/xsm/flask/policy/
A Daccess_vectors2 # Define the access vectors.
/xen/docs/man/
A Dxl.cfg.5.pod.in2297 per-vCPU event channel upcall vectors.

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