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Searched refs:wrmsr (Results 1 – 18 of 18) sorted by relevance

/xen/tools/firmware/hvmloader/
A Dcacheattr.c81 wrmsr(MSR_MTRRfix64K_00000, content); in cacheattr_init()
82 wrmsr(MSR_MTRRfix16K_80000, content); in cacheattr_init()
86 wrmsr(MSR_MTRRfix16K_A0000, content); in cacheattr_init()
90 wrmsr(MSR_MTRRfix4K_C0000 + i, content); in cacheattr_init()
109 wrmsr(MSR_MTRRphysBase(i), base); in cacheattr_init()
110 wrmsr(MSR_MTRRphysMask(i), (~(size - 1) & addr_mask) | (1u << 11)); in cacheattr_init()
124 wrmsr(MSR_MTRRphysBase(i), base); in cacheattr_init()
125 wrmsr(MSR_MTRRphysMask(i), (~(size - 1) & addr_mask) | (1u << 11)); in cacheattr_init()
133 wrmsr(MSR_MTRRdefType, mtrr_def); in cacheattr_init()
A Dhvmloader.c147 wrmsr(ebx, HYPERCALL_PHYSICAL_ADDRESS + (i << 12) + i); in init_hypercalls()
A Dutil.h70 void wrmsr(uint32_t idx, uint64_t v);
A Dutil.c45 void wrmsr(uint32_t idx, uint64_t v) in wrmsr() function
/xen/xen/arch/x86/
A Dnmi.c226 wrmsr(MSR_K7_EVNTSEL0, 0, 0); in disable_lapic_nmi_watchdog()
231 wrmsr(MSR_P6_EVNTSEL(0), 0, 0); in disable_lapic_nmi_watchdog()
234 wrmsr(MSR_P4_IQ_CCCR0, 0, 0); in disable_lapic_nmi_watchdog()
235 wrmsr(MSR_P4_CRU_ESCR0, 0, 0); in disable_lapic_nmi_watchdog()
290 wrmsr(base+i, 0, 0); in clear_msr_range()
317 wrmsr(MSR_K7_EVNTSEL0, evntsel, 0); in setup_k7_watchdog()
321 wrmsr(MSR_K7_EVNTSEL0, evntsel, 0); in setup_k7_watchdog()
347 wrmsr(MSR_P6_EVNTSEL(0), evntsel, 0); in setup_p6_watchdog()
351 wrmsr(MSR_P6_EVNTSEL(0), evntsel, 0); in setup_p6_watchdog()
/xen/xen/include/asm-x86/
A Dspec_ctrl_asm.h151 wrmsr
185 wrmsr
204 wrmsr
225 wrmsr
301 wrmsr
A Dmsr.h28 #define wrmsr(msr,val1,val2) \ macro
38 wrmsr(msr, lo, hi); in wrmsrl()
265 wrmsr(MSR_TSC_AUX, val, 0); in wrmsr_tsc_aux()
/xen/xen/arch/x86/acpi/
A Dwakeup_prot.S81 wrmsr
91 wrmsr
104 wrmsr
/xen/xen/arch/x86/boot/
A Dtrampoline.S92 wrmsr
98 wrmsr
104 wrmsr
A Dx86_64.S43 wrmsr
52 wrmsr
A Dwakeup.S131 wrmsr
138 wrmsr
/xen/xen/arch/x86/hvm/vmx/
A Dentry.S44 wrmsr
A Dvmcs.c715 wrmsr(MSR_IA32_FEATURE_CONTROL, eax, 0); in _vmx_cpu_up()
/xen/xen/arch/x86/x86_64/
A Dkexec_reloc.S163 wrmsr
A Dtraps.c337 wrmsr(MSR_IA32_SYSENTER_CS, __HYPERVISOR_CS, 0); in subarch_percpu_traps_init()
/xen/xen/arch/x86/cpu/
A Dintel.c351 wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); in Intel_errata_workarounds()
A Damd.c920 wrmsr(MSR_K7_HWCR, l, h); in init_amd()
/xen/xen/arch/x86/oprofile/
A Dop_model_athlon.c37 #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1);} while (0)

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